Abstract: An electronic device is provided. The electronic device includes: a first transistor configured to connect an input voltage node to a switching node; a second transistor configured to connect the switching node to a ground node; a latch circuit configured to generate a first signal having a first frequency and to control the first frequency based on a level of a load current; a switching modulation circuit configured to generate a second signal having a second frequency which is 1/N (where N is a natural number) times the first frequency; and a controller configured to control each of the first transistor and the second transistor, based on the second signal.

Abstract: A memory module includes first memory chips, each having a first input/output width, and configured to store data, a second memory chip having a second input/output width and configured to store an error correction code for correcting an error in the data, and a driver circuit configured to receive a clock signal, a command, and an address from a memory controller and to transmit the clock signal, the command, and the address to the first memory chips and the second memory chip. An address depth of each of the first memory chips and an address depth of the second memory chip are different from each other.

Abstract: A memory module includes first memory chips, each having a first input/output width, and configured to store data, a second memory chip having a second input/output width and configured to store an error correction code for correcting an error in the data, and a driver circuit configured to receive a clock signal, a command, and an address from a memory controller and to transmit the clock signal, the command, and the address to the first memory chips and the second memory chip. An address depth of each of the first memory chips and an address depth of the second memory chip are different from each other.

Abstract: A memory module includes first memory chips, each having a first input/output width, and configured to store data, a second memory chip having a second input/output width and configured to store an error correction code for correcting an error in the data, and a driver circuit configured to receive a clock signal, a command, and an address from a memory controller and to transmit the clock signal, the command, and the address to the first memory chips and the second memory chip. An address depth of each of the first memory chips and an address depth of the second memory chip are different from each other.

Abstract: A memory module includes first memory chips, each having a first input/output width, and configured to store data, a second memory chip having a second input/output width and configured to store an error correction code for correcting an error in the data, and a driver circuit configured to receive a clock signal, a command, and an address from a memory controller and to transmit the clock signal, the command, and the address to the first memory chips and the second memory chip. An address depth of each of the first memory chips and an address depth of the second memory chip are different from each other.

Abstract: Disclosed is a method and an apparatus for testing an optical fiber by using a biorthogonal codes and a Moore-Penrose inverse matrix. The method includes the steps of: (a) coding 2n optical pulses according to each codeword of the n-bit biorthogonal code matrix (2n*n matrix), injecting the coded optical pulses into an optical fiber, and measuring 2n optical signals generated when the coded optical pulses are reflected from the optical fiber; (b) decoding the 2n optical signals measured in step (a) by means of the Moore-Penrose inverse matrix (n*2n matrix) for the n-bit biorthogonal code matrix, thereby restoring n signals; (c) shifting the n signals along the time axis to remove timing differences among the n signals; and (d) performing an average operation for the time-shifted n signals and obtaining a final measured value.