Patents by Inventor Hou-An Su

Hou-An Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9368390
    Abstract: A method for fabricating a semiconductor apparatus including providing a first silicon substrate having a first contact, wherein providing the first silicon substrate comprises forming a silicide layer between the first silicon substrate and a first metal layer. The method further includes providing a second silicon substrate having a second contact comprising a second metal layer and placing the first contact in contact with the second contact. The method further includes heating the first and second metal layers to form a metallic alloy, whereby the metallic alloy bonds the first contact to the second contact.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: June 14, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chyi-Tsong Ni, I-Shi Wang, Hsin-Kuei Lee, Ching-Hou Su
  • Publication number: 20160126587
    Abstract: The present disclosure provides an embodiment of an integrated structure that includes a first electrode of a first conductive material embedded in a first semiconductor substrate; a second electrode of a second conductive material embedded in a second semiconductor substrate; and a electrolyte disposed between the first and second electrodes. The first and second semiconductor substrates are bonded together through bonding pads such that the first and second electrodes are enclosed between the first and second semiconductor substrates. The second conductive material is different from the first conductive material.
    Type: Application
    Filed: January 13, 2016
    Publication date: May 5, 2016
    Inventors: Chyi-Tsong Ni, I-Shi Wang, Yi Hsun Chiu, Ching-Hou Su
  • Patent number: 9323016
    Abstract: The instant disclosure relates to bi-direction data transmission method, high-frequency connector and an optical connector using the same. The optical connector includes a first circuit board, a second circuit board, a high-frequency connector and an optical fiber cable. One optical engine is set on the first circuit board. The high-frequency connector is set between the first circuit board and the second circuit board for connecting both two circuit boards. The high-frequency connector includes an insulation base. The insulation base has at least one terminal-accommodating region. Pluralities of connection terminals are inserted into the terminal-accommodating regions of the insulation base. The optical fiber cable connects to the one optical engine.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: April 26, 2016
    Assignee: NEXTRONICS ENGINEERING CORP.
    Inventors: Hou-An Su, Chi-Jung Chan, Hung-Wei Hsu
  • Publication number: 20160079709
    Abstract: A signal transmission connector includes an insulating body, a plurality of first terminals, a plurality of second terminals, and a rear casing. The insulating body has a dielectric constant of about 3 to 3.4. The first and second terminals are disposed on the insulating body. The first and second terminals have widths of about 0.36 to 0.42 mm. The rear casing is assembled at the second end of the insulating body. The rear casing envelops the first and the second terminals. The rear casing has a dielectric constant of about 3.5 to 3.8. The connector provides adjustable impedance without modifications to the terminal structures and also reduces cost.
    Type: Application
    Filed: November 23, 2015
    Publication date: March 17, 2016
    Inventors: HOU-AN SU, HUNG-WEI HSU, CHANG-FA YANG, HUAI-SHENG WANG
  • Patent number: 9287188
    Abstract: A wafer seal ring may be formed on a first and/or a second wafer. One or both of the first and/or second wafers may have one or more dies formed thereon. The wafer seal ring may be formed to surround the dies of a corresponding wafer. One or more die seal rings may be formed around the one or more dies. The wafer seal ring may be formed to a height that may be approximately equal to a height of one or more die seal rings formed on the first and/or second wafer. The wafer seal ring may be formed to provide for eutectic or fusion bonding processes. The first and second wafers may be bonded together to form a seal ring structure between the first and second wafers. The seal ring structure may provide a hermetic seal between the first and second wafers.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: March 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Ying Chen, Yi Hsun Chiu, Ching-Hou Su, Chyi-Tsong Ni
  • Publication number: 20160009550
    Abstract: A method of fabricating a micro electro mechanical system (MEMS) structure includes providing a first substrate structure including a bonding pad structure. The bonding pad structure has at least one recess therein. A second substrate structure is provided and bonded with the bonding pad structure of the first substrate structure.
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Inventors: Ting-Ying Chien, Ching-Hou Su, Chyi-Tsong Ni, Yi Hsun Chiu
  • Publication number: 20150340337
    Abstract: An apparatus includes a bonding system configured to bond at least two wafers. The bonding system has a flag-out mechanism configured to remove a plurality of flags from an area between the at least two wafers. The apparatus also includes sensors configured to detect data related to a flag-out condition of the flags of the plurality of flag. The apparatus further includes at least one processor configured to receive inputs from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment of the at least two wafers.
    Type: Application
    Filed: August 6, 2015
    Publication date: November 26, 2015
    Inventors: Yun-Tai SHIH, Kuan-Ming PAN, Jeng-Hao LIN, I-Shi WANG, Jui-Mu CHO, Ching-Hou SU, Chyi-Tsong NI, Wun-Kai TSAI
  • Patent number: 9160090
    Abstract: An electrical connector module for electrically connecting at least one connector to a printed circuit board of an electronic device includes at least one shielding jack having a top wall, two opposite side walls and at least one common wall. The walls of the shielding jack collectively define at least a slot therewithin for receiving the connectors and a front end and an opposite rear end. The slot is divided by the common wall. The side walls and the common wall have a plurality of press fit terminals extending toward the circuit board. The common wall has a plurality of offset latch arms engaged with different connectors. When the connectors are inserted to the slots, the offset latch arms respectively secure the connectors in the corresponding slots.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 13, 2015
    Assignees: NEXTRONICS ENGINEERING CORP., YAMAICHI ELICTRONICS CO., LTD.
    Inventors: Hou-An Su, Hai-Wen Yang, Xuan Luo, Hai-Yang Xiao, Toshiyasu Ito, Masaaki Saito
  • Patent number: 9139423
    Abstract: A micro electro mechanical system (MEMS) structure includes a first substrate structure including a bonding pad structure. The bonding pad structure has at least one recess therein. A second substrate structure is bonded with the bonding pad structure of the first substrate structure.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: September 22, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Ying Chien, Yi Hsun Chiu, Ching-Hou Su, Chyi-Tsong Ni
  • Patent number: 9124031
    Abstract: A pluggable self locking connector includes a socket having a socket case and a plug having a plug shell and a snap fit portion coupled thereto. The socket case is formed with a depression on the inner wall. The outer wall of the snap fit portion is formed with a deformable resilient rib and a bump. The plug shell is formed with an opening for receiving the resilient rib and a resilient latch corresponding to the bump. The front end of the plug shell has a resilient positioning member. When the socket and plug mate, the resilient rib slides into the depression. When the socket and the plug separate, the resilient rib is confined within the depression and the resilient latch and the bump are engaged. The front end of the snap fit portion presses the resilient positioning member and the resilient positioning member is partially exposed.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: September 1, 2015
    Assignee: NEXTRONICS ENGINEERING CORP.
    Inventors: Hou-An Su, Hai-Wen Yang, Xin-Chao Xiao
  • Patent number: 9123754
    Abstract: An apparatus is disclosed for detecting flag velocity during a eutectic process for bonding two wafers. The apparatus includes a plurality of sensors for detecting a time and/or velocity of a plurality of flags within a flag-out mechanism. The apparatus also includes one or more displays displaying time durations associated with the movement of the flags during the bonding process. Also disclosed is a method of aligning wafers in a eutectic bonding process. The method includes determining one or more time durations associated with the movement of the flags in the plurality of flags. The method also includes determining if a misalignment has occurred based on the one or more time durations associated with the movement of the flags.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: September 1, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun-Tai Shih, Kuan-Ming Pan, Jeng-Hao Lin, I-Shi Wang, Jui-Mu Cho, Ching-Hou Su, Chyi-Tsong Ni, Wun-Kai Tsai
  • Publication number: 20150155665
    Abstract: A signal transmission connector includes an insulating body, a plurality of first terminals, a plurality of second terminals, and a rear casing. The insulating body has a dielectric constant of about 3 to 3.4. The first and second terminals are disposed on the insulating body. The first and second terminals have widths of about 0.36 to 0.42 mm. The rear casing is assembled at the second end of the insulating body. The rear casing envelops the first and the second terminals. The rear casing has a dielectric constant of about 3.5 to 3.8. The connector provides adjustable impedance without modifications to the terminal structures and also reduces cost.
    Type: Application
    Filed: January 18, 2014
    Publication date: June 4, 2015
    Applicant: NEXTRONICS ENGINEERING CORP.
    Inventors: HOU-AN SU, HUNG-WEI HSU, CHANG-FA YANG, HUAI- SHENG WANG
  • Publication number: 20150016782
    Abstract: The instant disclosure relates to bi-direction data transmission method, high-frequency connector and an optical connector using the same. The optical connector includes a first circuit board, a second circuit board, a high-frequency connector and an optical fiber cable. One optical engine is set on the first circuit board. The high-frequency connector is set between the first circuit board and the second circuit board for connecting both two circuit boards. The high-frequency connector includes an insulation base. The insulation base has at least one terminal-accommodating region. Pluralities of connection terminals are inserted into the terminal-accommodating regions of the insulation base. The optical fiber cable connects to the one optical engine.
    Type: Application
    Filed: October 7, 2013
    Publication date: January 15, 2015
    Applicant: NEXTRONICS ENGINEERING CORP.
    Inventors: HOU-AN SU, CHI-JUNG CHAN, HUNG-WEI HSU
  • Publication number: 20140302713
    Abstract: An electrical connector module for electrically connecting at least one connector to a printed circuit board of an electronic device includes at least one shielding jack having a top wall, two opposite side walls and at least one common wall. The walls of the shielding jack collectively define at least a slot therewithin for receiving the connectors and a front end and an opposite rear end. The slot is divided by the common wall. The side walls and the common wall have a plurality of press fit terminals extending toward the circuit board. The common wall has a plurality of offset latch arms engaged with different connectors. When the connectors are inserted to the slots, the offset latch arms respectively secure the connectors in the corresponding slots.
    Type: Application
    Filed: October 30, 2013
    Publication date: October 9, 2014
    Applicants: YAMAICHI ELICTRONICS CO., LTD., NEXTRONICS ENGINEERING CORP.
    Inventors: HOU-AN SU, HAI-WEN YANG, XUAN LUO, HAI-YANG XIAO, TOSHIYASU ITO, MASAAKI SAITO
  • Publication number: 20140235085
    Abstract: A pluggable self locking connector includes a socket having a socket case and a plug having a plug shell and a snap fit portion coupled thereto. The socket case is formed with a depression on the inner wall. The outer wall of the snap fit portion is formed with a deformable resilient rib and a bump. The plug shell is formed with an opening for receiving the resilient rib and a resilient latch corresponding to the bump. The front end of the plug shell has a resilient positioning member. When the socket and plug mate, the resilient rib slides into the depression. When the socket and the plug separate, the resilient rib is confined within the depression and the resilient latch and the bump are engaged. The front end of the snap fit portion presses the resilient positioning member and the resilient positioning member is partially exposed.
    Type: Application
    Filed: January 14, 2014
    Publication date: August 21, 2014
    Applicant: NEXTRONICS ENGINEERING CORP.
    Inventors: HOU-AN SU, HAI-WEN YANG, XIN-CHAO XIAO
  • Publication number: 20140217557
    Abstract: A wafer seal ring may be formed on a first and/or a second wafer. One or both of the first and/or second wafers may have one or more dies formed thereon. The wafer seal ring may be formed to surround the dies of a corresponding wafer. One or more die seal rings may be formed around the one or more dies. The wafer seal ring may be formed to a height that may be approximately equal to a height of one or more die seal rings formed on the first and/or second wafer. The wafer seal ring may be formed to provide for eutectic or fusion bonding processes. The first and second wafers may be bonded together to form a seal ring structure between the first and second wafers. The seal ring structure may provide a hermetic seal between the first and second wafers.
    Type: Application
    Filed: February 5, 2013
    Publication date: August 7, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Ying Chen, Yi Hsun Chiu, Ching-Hou Su, Chyi-Tsong Ni
  • Patent number: D712360
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: September 2, 2014
    Assignee: Nextronics Engineering Corp.
    Inventors: Hou-An Su, Hai-Wen Yang, Xin-Chao Xiao
  • Patent number: D726122
    Type: Grant
    Filed: February 3, 2013
    Date of Patent: April 7, 2015
    Assignee: Nextronics Engineering Corp.
    Inventors: Hou-An Su, Hai-Wen Yang, Xin-Chao Xiao
  • Patent number: D726123
    Type: Grant
    Filed: February 3, 2013
    Date of Patent: April 7, 2015
    Assignee: Nextronics Engineering Corp.
    Inventors: Hou-An Su, Hai-Wen Yang, Xin-Chao Xiao
  • Patent number: D749519
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: February 16, 2016
    Assignee: NEXTRONICS ENGINEERING CORP.
    Inventors: Hou-An Su, Hai-Wen Yang, Xin-Chao Xiao