Patents by Inventor Hou Chang

Hou Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7807378
    Abstract: The present invention relates to methods of diagnosing myasthenia gravis in a subject, by determining an amount of at least one autoantibody that specifically binds one or more autoantigens selected from heat-shock protein 60 (hsp60), heat-shock protein 90, alpha isoform (hsp90?), and heat-shock protein 90, beta isoform (hsp90?). The invention also provides diagnostic kits for identifying a subject having myasthenia gravis.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: October 5, 2010
    Assignees: Industrial Technology Research Institute (ITRI), National Health Research Institutes (NHRI), Shin Kong Wu Ho-Su Memorial Hospital
    Inventors: Tzu-Ling Tseng, Pei-Hsiu Liao, Ping-Fu Cheng, Shih-Feng Tsai, Hou-Chang Chiu
  • Publication number: 20080117207
    Abstract: The present invention includes steps of: acquiring a first image information; making the first image information to have a hidden attribute; acquiring a second image information in a displaying format; acquiring the first image information and the second image information to perform a blending operation for producing a third image information in a displaying format to output to a first display device; editing the second image information in the displaying format through the third image information in the displaying format displayed on the first display device; and drawing the edited second image information to produce a drawn image information in the displaying format, thereby, as editing the second image information, the third image information which is displayed on the first display device and contains the first image information can act as reference, so as to avoid the drawn image information from containing the first image information.
    Type: Application
    Filed: August 29, 2007
    Publication date: May 22, 2008
    Inventors: Pao-Ta YU, Yuan-Hou CHANG
  • Publication number: 20080009153
    Abstract: A semiconductor package and its fabrication method are disclosed. The fabrication method has the steps of: providing at least a lead frame having a plurality of terminal leads formed with flat portions and contacting portions, providing at least a circuit board having a plurality of electrical connection pads, mounting the contacting portions on and electrically connecting to the electrical connection pads, attaching and electrically connecting electronic elements to the circuit board, forming an encapsulant for encapsulating the lead frames and the electronic elements but uncovering the flat portions of the terminal leads, and cutting around the circuit board along a cutting path that crosses through each of the terminal leads so as to allow each of the terminal leads to be electrically independent, wherein the terminal leads are employed to act as the electrical terminals of USB memory cards for storing or retrieving data.
    Type: Application
    Filed: May 8, 2007
    Publication date: January 10, 2008
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Toniady Tan, Cheng-Chung Yu, Hung-Chi Wei, Chih-Hou Chang, Huan-Shiang Li
  • Publication number: 20070267732
    Abstract: A circuit card module and a method for fabricating the same are disclosed. The present invention includes the steps of providing a carrier having at least a first carrying region and a second carrying region that are co-planar; respectively mounting a substrate electrically connected to a first chip on the first carrying region, and a second chip electrically connected the substrate on the second carrying region, wherein the substrate is provided with at least an area of electrical connecting portion for being connected with external devices so as to reduce areas required for mounting a larger substrate or another substrate, thereby allowing a circuit card module to be fabricated with a minimized substrate.
    Type: Application
    Filed: May 8, 2007
    Publication date: November 22, 2007
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Toniady Tan, Cheng-Chung Yu, Hung-Chi Wei, Chih-Hou Chang, Huan-Shiang Li
  • Publication number: 20070174784
    Abstract: The present invention discloses a method for presenting objects of the Windows operating environment on multiple display devices, which is implemented with a series of computer-executable steps, wherein the attribute values of the display regions of multiple display devices (such as the resolutions thereof) and the attribute values of at least one object of the Windows operating environment are used to redefine a restricted display region that may cross multiple display device; via coordinatizing the objects and the display regions of the display devices, the fiducial coordinates of the objects can be moved to the assigned display coordinates inside the restricted display region to present the objects on within the restricted display region. Thereby, the objects can only be moved within the assigned display region of the screens, and the existing/uncreated objects can be moved/assigned to the intended positions or regions.
    Type: Application
    Filed: April 24, 2006
    Publication date: July 26, 2007
    Inventors: Pao-Ta Yu, Yuan-Hou Chang
  • Publication number: 20070154968
    Abstract: The present invention relates to methods of diagnosing myasthenia gravis in a subject, by determining an amount of at least one autoantibody that specifically binds one or more autoantigens selected from heat-shock protein 60 (hsp60), heat-shock protein 90, alpha isoform (hsp90?), and heat-shock protein 90, beta isoform (hsp90?). The invention also provides diagnostic kits for identifying a subject having myasthenia gravis.
    Type: Application
    Filed: December 29, 2005
    Publication date: July 5, 2007
    Inventors: Tzu-Ling Tseng, Pei-Hsiu Liao, Ping-Fu Cheng, Shih-Feng Tsai, Hou-Chang Chiu
  • Publication number: 20050101133
    Abstract: A method for making negative thermal expansion material zirconium tungstate (ZrW2O8) comprise: (a)forming a gel wrapped solid product comprising a water-soluble zirconium compound, preferably zirconium oxyhalides or zirconium oxynitrates and a water-insoluble tungsten compound, preferably tungsten powder or tungsten oxide powder; and (b)heating the gel wrapped solid product to a temperature sufficient to form ZrW2O8; the temperature required for forming zirconium tungstate should be at least about 1165° C.; the upper limit of the temperature should be about 1250° C., and preferably should be about 1180˜1200° C.; and the time needed for the formation of zirconium tungstate is less than about 5 hours; this method has the advantages on enhancing the selectivity of the reactants, simplifying production process, reducing the cost of reagent, and facilitating the mass production for making ZrW2O8.
    Type: Application
    Filed: November 10, 2003
    Publication date: May 12, 2005
    Inventors: Der Tzeng, Hou Chang, Jen Wu
  • Publication number: 20050071970
    Abstract: A manufacturing method for electrodes that inhibit corona effect on ceramic capacitor is disclosed. It is mainly to coat the two electrodes of a ceramic capacitor (including AC ceramic capacitor and DC ceramic capacitor) by printing or chemical electroless plating and vapor deposition. Then, the coating overflow area of the ceramic capacitor is subject to polishing treatment, so the cross-section of the two electrodes of the ceramic capacitor is completely covered by conductive layer and electrode leakage is eliminated. Besides, withstanding voltage is thus increased and corona effect is inhibited.
    Type: Application
    Filed: December 12, 2003
    Publication date: April 7, 2005
    Inventor: Wei-Hou Chang
  • Publication number: 20050059582
    Abstract: The present invention provides a use of soluble P-selectin in treating systemic hemorrhagic conditions, stabilizing blood pressure, and protecting hypoxic/ischemic tissues. Also provided is a use of anthrax lethal toxin in treating thrombotic conditions.
    Type: Application
    Filed: July 29, 2004
    Publication date: March 17, 2005
    Inventors: Hsin-Hou Chang, Der-Shan Sun
  • Publication number: 20020195721
    Abstract: In a cavity down BGA packaging structure, a circuit substrate is bonded onto a heat spreader. A cavity formed is formed in the circuit substrate into which a chip is bonded onto the heat spreader. The circuit substrate has at least an insulating layer, a patterned wiring layer, and a via electrically connected to the heat spreader. A first ground pad, ball pad, and first contact pad are defined on the patterned wiring layer, wherein the first ground pad is spaced apart from and electrically connected to the via. The chip comprises at least a second contact pad and a second ground pad respectively connected to the first contact pad and the heat spreader. An encapsulant material encapsulates the cavity, the chip, and the first and second contact pads. A plurality of solder balls are attached to the first ground pad and ball pad.
    Type: Application
    Filed: March 5, 2002
    Publication date: December 26, 2002
    Inventors: Chun-Chi Lee, Jaw-Shiun Hsieh, Yao-Hsin Feng, Hou-Chang Kuo, Kuan-Neng Liao, Yu-Hsien Lin
  • Patent number: 6483187
    Abstract: A heat-spread substrate consisting of a metal heat spreader and a substrate is disclosed. The metal heat spreader has a surface with a cavity, which is adapted for supporting a die. Such surface further includes a ground ring arranged at the periphery of the cavity; a substrate-supporting surface surrounding the periphery of the ground ring; a plurality of first ground pads arranged at the periphery of the substrate-supporting surface; and a plurality of second ground pads arranged on the substrate-supporting surface and protruding it. The substrate is provided on the substrate-supporting surface having a plurality of through holes. The through holes corresponds to the first ground pad so as to make it be located therein, respectively. The substrate further includes a plurality of mounting pads and a plurality of ball pads, in which the mounting pads are close to the cavity, and the first ground pad, the second ground pads and the ball pads are formed in the form of ball grid array and are coplanar roughly.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: November 19, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shin-Hua Chao, Kuan-Neng Liao, Yao-Hsin Feng, Hou-Chang Kuo
  • Patent number: 6210232
    Abstract: An electrical connector comprises an insulative body defining a number of passageways therein, a shield enclosing the body, a number of contacts received in corresponding passageways, and a polyswitch for preventing excessive current from damaging the connector. One of the contacts consists of first and second contact members. The first contact member is adapted for mating with a mating contact of a complementary connector and the second contact member is adapted for being soldered to a circuit board. The polyswitch is retained in a cavity formed in the insulative body and is securely sandwiched between the first and second contact members.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: April 3, 2001
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Chin-Yi Lai, Jen-Hou Chang
  • Patent number: 5629563
    Abstract: A multi-chip packaging arrangement that contemplates stacking discrete components over film based components is disclosed. The multi-chip package includes a substrate having one or more film based components formed thereon. A discrete component is mounted on the substrate over the film based component such that it is electrically isolated from the film based component. One or more die components are also mounted on the substrate and a plurality of leads are provided for electrically connecting the multi-chip package to external circuitry. Wiring traces formed on the substrate are provided to electrically connect various ones of the components and the leads. A packaging material is provided to encapsulate the components and the wiring traces and leaves a portion of the leads exposed to facilitate electrically connecting the multi-chip package to external circuitry. Methods of making such multi-chip packages are also disclosed.
    Type: Grant
    Filed: November 7, 1995
    Date of Patent: May 13, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, Uli H. Hegel, Peter H. Spalding, James L. Crozier, Michelle M. Hou-Chang, Martin A. Delateur
  • Patent number: D528508
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: September 19, 2006
    Assignee: Fiskars Brands, Inc.
    Inventors: Swee Keong Tan, Feng Hou Chang