Abstract: Embodiments of the present application provide a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a base with an electrical contact layer therein; forming an insulating layer on the base, the insulating layer having a through hole penetrating the insulating layer, and the through hole exposing a surface of the electrical contact layer; forming a sidewall layer on a sidewall of the through hole; forming a first isolation layer, the first isolation layer covering a surface of the sidewall layer and an exposed surface of the insulating layer; removing the sidewall layer to form a gap between the first isolation layer and the insulating layer; and forming a conducting layer filling the through hole, the conducting layer being electrically connected to the electrical contact layer.

Abstract: A memory device is disclosed, comprising a substrate, and a capacitor with a specific shape along an orientation parallel to a surface of the substrate, wherein the specific shape includes a curved outer edge, a curved inner edge having a positive curvature, a first line and a second line connecting the curved outer edge with the curved inner edge. A word line is coupled to the capacitor. In an embodiment of the invention, the capacitor is a deep trench capacitor with a vertical transistor. In another embodiment of the invention, the capacitor is a stacked capacitor.

Abstract: The invention is related to a memory device, including a substrate, a capacitor which is substantially C-shaped in a cross section parallel to the substrate surface and a word line coupling the capacitor. In an embodiment, the C-shaped capacitor is a stack capacitor. Both inner edge and outer edge of the C-shaped capacitor can be used for providing capacitance.

Abstract: The invention is related to a memory device, including a substrate, a capacitor which is substantially C-shaped in a cross section parallel to the substrate surface and a word line coupling the capacitor. In an embodiment, the C-shaped capacitor is a deep trench capacitor, and in alternative embodiment, the C-shaped capacitor is a stack capacitor. Both inner edge and outer edge of the C-shaped capacitor can be used for providing capacitance.

Abstract: A memory device is disclosed, comprising a substrate, and a capacitor with a specific shape along an orientation parallel to a surface of the substrate, wherein the specific shape includes a curved outer edge, a curved inner edge having a positive curvature, a first line and a second line connecting the curved outer edge with the curved inner edge. A word line is coupled to the capacitor. In an embodiment of the invention, the capacitor is a deep trench capacitor with a vertical transistor. In another embodiment of the invention, the capacitor is a stacked capacitor.

Abstract: The invention is related to a memory device, including a substrate, a capacitor which is substantially C-shaped in a cross section parallel to the substrate surface and a word line coupling the capacitor. In an embodiment, the C-shaped capacitor is a deep trench capacitor, and in alternative embodiment, the C-shaped capacitor is a stack capacitor. Both inner edge and outer edge of the C-shaped capacitor can be used for providing capacitance.

Abstract: The present invention provides a method of removing residual particles from a polished surface. The method comprises the steps of: providing a substrate, forming a dielectric layer on the substrate, brush-cleaning and etching the dielectric layer on the substrate with a liquid when residual particles are lodged therein, whereby the residual particles are loosened and then relocated to the dielectric layer, and finally cleaning the dielectric layer to remove the relocated residual particles.

Abstract: The present invention provides a method of removing residual particles from a polished surface. The method comprises the steps of: providing a substrate, forming a dielectric layer on the substrate, brush-cleaning and etching the dielectric layer on the substrate with a liquid when residual particles are trapped therein, whereby the residual particles are loosened and then relocated to the dielectric layer, and finally cleaning the dielectric layer to remove the relocated residual particles.