Abstract: A microwave transistor has a patterned region between a source and a drain on a barrier layer. Within the patterned region, the surface of the barrier layer partially recessed downwards in the thickness direction to form a plurality of grooves. A gate covers the patterned region. The length of the gate is greater than the lengths of the grooves in the length direction of the gate, so as to completely cover the grooves. In one aspect, by arranging the grooves, the gate control capability of a component is improved and the short-channel effect is suppressed; in another aspect, an original heterostructure below the gate is preserved; in this way, the reduction of the conductive capability due to the reduction of the two-dimensional electron gas density is avoided; and accordingly the current output capability of the component is ensured while the short-channel effect is suppressed.

Abstract: A Silicon Carbide (SiC) power device employing a heterojunction terminal includes: a cathode electrode, a substrate layer, an N-type SiC extension layer, an anode electrode, and a plurality of P-type structures disposed at interval. The plurality of P-type structures grow and form, via a heterogeneous epitaxy, using a P-type semiconductor material having a growth temperature less than that of SiC, and on the N-type SiC extension layer, and are evenly or unevenly distributed at periphery of the anode electrode, so as to form a heterogeneous terminal. Therefore, the embodiment effectively prevents impact on a doping characteristic of the N-type SiC extension layer, and can obtain a SiC device having a high breakdown voltage and low device turn-on voltage. Also provided is a manufacturing method of the SiC power device. The embodiment reduces requirements for a high-temperature or complex technique, provides a simple process, and reduces manufacturing costs.

Abstract: A microwave transistor has a patterned region between a source and a drain on a barrier layer. Within the patterned region, the surface of the barrier layer partially recessed downwards in the thickness direction to form a plurality of grooves. A gate covers the patterned region. The length of the gate is greater than the lengths of the grooves in the length direction of the gate, so as to completely cover the grooves. In one aspect, by arranging the grooves, the gate control capability of a component is improved and the short-channel effect is suppressed; in another aspect, an original heterostructure below the gate is preserved; in this way, the reduction of the conductive capability due to the reduction of the two-dimensional electron gas density is avoided; and accordingly the current output capability of the component is ensured while the short-channel effect is suppressed.