Patents by Inventor Hou Tao

Hou Tao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming a floating gate for a stacked gate flash memory device
    Patent number: 6916708
    Abstract: A new method to form a floating gate for a flash memory device is achieved. The method comprises forming a first conductor layer overlying a substrate with a gate dielectric layer therebetween. A masking layer is deposited overlying the first conductor layer. The masking layer is patterned to expose first regions of and to cover second regions of the first conductor layer. A plurality of first concave surfaces are formed on the first conductor layer first regions. The masking layer is removed. A plurality of second concave surfaces are formed on the first conductor layer second regions. The first conductor layer is patterned to form floating gates. The interfaces between the plurality of first and second concave surfaces form vertical tips on the floating gates. A method to form an electron emitter is also disclosed.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: July 12, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hou Tao, Jih Ren Tsai
  • METHOD OF FORMING A FLOATING GATE FOR A STACKED GATE FLASH MEMORY DEVICE
    Publication number: 20050124115
    Abstract: A new method to form a floating gate for a flash memory device is achieved. The method comprises forming a first conductor layer overlying a substrate with a gate dielectric layer therebetween. A masking layer is deposited overlying the first conductor layer. The masking layer is patterned to expose first regions of and to cover second regions of the first conductor layer. A plurality of first concave surfaces are formed on the first conductor layer first regions. The masking layer is removed. A plurality of second concave surfaces are formed on the first conductor layer second regions. The first conductor layer is patterned to form floating gates. The interfaces between the plurality of first and second concave surfaces form vertical tips on the floating gates. A method to form an electron emitter is also disclosed.
    Type: Application
    Filed: December 4, 2003
    Publication date: June 9, 2005
    Inventors: Hou Tao, Jih Tsai