Patents by Inventor Hou-Yuan Chou

Hou-Yuan Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11871510
    Abstract: A conductive pattern has been disclosed. The conductive pattern includes a pair of conductive traces. Each of the conductive traces comprises a linear portion and a terminal portion. The terminal portions are arranged adjacent to each other and comprises a pair of circular arc profile with a pair of complementary notches facing toward each other.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: January 9, 2024
    Assignee: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD.
    Inventors: Hou-Yuan Chou, Yi-Chih Wu, Feng-Hua Deng, Ming-Fang Chen
  • Publication number: 20230342385
    Abstract: A method for extracting text relevant to a particular topic from a document to generate a narrower, condensed, more specific, and smaller version obtains information as to the text of a large document and searches the text information of the document based on first keywords to extract first pages. The first pages are inputted into a predetermined learning model to extract second keywords from the first pages, and the first keywords and the second keywords are integrated to obtain third keywords. The method further searches the text of the first pages based on the third keywords to extract second pages and a determination is made as to whether the second pages meet a predetermined page standard. If yes, the second pages are integrated and output. An electronic device and a non-transitory storage medium are also disclosed.
    Type: Application
    Filed: April 21, 2023
    Publication date: October 26, 2023
    Inventors: JIAN-CAI CHEN, JUN-CONG GONG, GUANG-LIN HU, HOU-YUAN CHOU
  • Patent number: 11596067
    Abstract: An apparatus having stacked circuit boards has been disclosed. The apparatus includes a main circuit board and a sub circuit board disposed over the main circuit board. A plurality of sub components disposed on a bottom face of the sub circuit board penetrates through main circuit board and extends towards a bottom face of the main circuit board. In this say, a compact apparatus is produced.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: February 28, 2023
    Assignee: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD.
    Inventors: Hou-Yuan Chou, Yi-Chih Wu
  • Publication number: 20220369474
    Abstract: A circuit board structure includes a rigid circuit board, a flexible circuit board, a plurality of conductive bumps, and a plurality of spacers. The rigid and flexible circuit boards are stacked one above the other. The conductive bumps are formed between the rigid and flexible circuit boards. The spacers are formed between the rigid and flexible circuit boards and spaced apart from the conductive bumps.
    Type: Application
    Filed: May 31, 2021
    Publication date: November 17, 2022
    Inventors: HOU-YUAN CHOU, XIAO-CHU JIN, SHI ZHANG, BO WU, ZHI-HONG XU, MEI-WEN KAO, YI-CHIH WU
  • Publication number: 20220232701
    Abstract: An apparatus having stacked circuit boards has been disclosed. The apparatus includes a main circuit board and a sub circuit board disposed over the main circuit board. A plurality of sub components disposed on a bottom face of the sub circuit board penetrates through main circuit board and extends towards a bottom face of the main circuit board. In this say, a compact apparatus is produced.
    Type: Application
    Filed: April 23, 2020
    Publication date: July 21, 2022
    Applicant: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD.
    Inventors: HOU-YUAN CHOU, YI-CHIH WU
  • Publication number: 20200323080
    Abstract: A circuit board optimized for a denser component population within a standard size of footprint includes a mother board and a plurality of sub-board layers stacked on and connected to the mother board. Each of the sub-board layers has a plurality of daughter boards. The sub-board layers are composed of a first sub-board layer and a second sub-board layer. The daughter boards of the first sub-board layer are arranged on a side of the mother board, and the daughter boards of the second sub-board layer are arranged on the daughter boards of the first sub-board layer.
    Type: Application
    Filed: May 7, 2019
    Publication date: October 8, 2020
    Inventors: HOU-YUAN CHOU, YI-CHIH WU
  • Patent number: 10785873
    Abstract: A circuit board optimized for a denser component population within a standard size of footprint includes a mother board and a plurality of sub-board layers stacked on and connected to the mother board. Each of the sub-board layers has a plurality of daughter boards. The sub-board layers are composed of a first sub-board layer and a second sub-board layer. The daughter boards of the first sub-board layer are arranged on a side of the mother board, and the daughter boards of the second sub-board layer are arranged on the daughter boards of the first sub-board layer.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: September 22, 2020
    Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., I, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Hou-Yuan Chou, Yi-Chih Wu
  • Patent number: 10470308
    Abstract: A circuit board assembly comprising a printed circuit main board and a printed circuit sub-board, to avoid layout constraints, can support components on either board. The printed circuit main board includes first signal layer, and first and second through holes in the first signal layer. A first wire electrically couples a first electronic component and the first through hole. A second signal layer with third and fourth through holes is found on the printed circuit sub-board. The third through hole is electrically coupled to the first through hole, and the fourth through hole is electrically coupled to the second through hole.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: November 5, 2019
    Assignees: HONGFUJIN PRECISION INDUSTRY (WUHAN) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Hou-Yuan Chou, Ming-Fang Chen, Yi-Chih Wu
  • Patent number: 10390430
    Abstract: A circuit board includes a board defining a holding slot and a connector. The connector includes a conductive column and a pad fixed to one end of the conductive column. The pad is received within the holding slot. The conductive column is fixed within the board. The pad is soldered to a connecting portion of an electrical component. The pad defines a first through hole receiving solder when the connecting portion of the electrical component is soldered to the pad.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: August 20, 2019
    Assignees: HONGFUJIN PRECISION INDUSTRY (WUHAN) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Hou-Yuan Chou, Yi-Chih Wu
  • Publication number: 20160183360
    Abstract: A printed circuit board for an electronic device includes first and second sets of differential vias. Each set of differential vias comprises two vias. A first line segment couples two centres of the two vias of the first set of differential vias. A second line segment couples two centres of the two vias of the second set of differential vias. The first line segment is parallel to the second line segment, and is offset a first distance from the second line segment. A first perpendicular bisector of the first line segment is offset a second distance from a second perpendicular bisector of the second line segment. The second distance is between 45 mil and 55 mil. Therefore, the near end crosstalk and far end crosstalk of two couples of differential vias are minimum.
    Type: Application
    Filed: April 17, 2015
    Publication date: June 23, 2016
    Inventors: NIAN MIN, HOU-YUAN CHOU, BING CHEN
  • Publication number: 20150163910
    Abstract: A printed circuit board includes a first signal layer, a second signal layer, a third signal layer located between the first and second signal layers, a ground layer located between the second and third signal layers, first transmission line located on the first signal layer, a second transmission line located on the third layer, a via passing through the printed circuit board, and annular solders defined on the first, second, and third signal layers respectively and surrounding the via. The via is isolated from the ground layer and electronically coupled to the first and second transmission lines through the annular solder. A distance between the ground layer and the via is greater than a radius difference of the annular solder on the second signal layer.
    Type: Application
    Filed: November 13, 2014
    Publication date: June 11, 2015
    Inventors: NIAN MIN, HOU-YUAN CHOU, BING CHEN
  • Patent number: 9042116
    Abstract: A printed circuit board includes a motherboard and a daughterboard. The motherboard includes at least one first signal pad and defines at least one via under the at least one first signal pad. The daughterboard includes at least one second signal pad and defines at least one via under the at least one second signal pad. The at least one first signal pad and the at least one second signal pad are sucked into the respective vias on the motherboard and the daughterboard according to siphon principle to allow each of the first signal pads and the second signal pads to form uneven top surfaces, the uneven top surfaces of the at least one first signal pads and the at least one second signal pads are connected to each other for electronically connecting the daughterboard to the motherboard.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: May 26, 2015
    Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Hsin-Kuan Wu, Hou-Yuan Chou
  • Publication number: 20130329393
    Abstract: A printed circuit board includes a motherboard and a daughterboard. The motherboard includes at least one first signal pad. The daughterboard includes at least one second signal pad electronically connected to the at least one first signal pad for electronically connecting the daughterboard to the motherboard.
    Type: Application
    Filed: February 28, 2013
    Publication date: December 12, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (WUHAN) CO., LTD.
    Inventors: HSIN-KUAN WU, HOU-YUAN CHOU
  • Patent number: 8498128
    Abstract: A PCB includes a number of insulation layers, a number of circuit layers, a signal-interfering component, and a signal-sensitive component. The circuit layers and the insulation layers are stacked alternately. The circuit layers include at least two first circuit layers, a second circuit layer, and a ground layer. The ground layer has a first side and a second side facing away the first side. The first circuit layers are positioned near the first side and include an outmost first circuit layer and at least one inner first circuit layer positioned between the outmost first circuit layer and the ground layer. The second circuit layer is positioned near the second side. The signal-interfering component is positioned on the outmost first circuit layer. The signal-sensitive component is positioned on the second circuit layer. Each inner first circuit layer defines a copper-remove area corresponding to an orthogonal projection of the signal-interfering component thereon.
    Type: Grant
    Filed: October 31, 2010
    Date of Patent: July 30, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ning Wu, Hsin-Kuan Wu, Hou-Yuan Chou, Shun-Bo Bai, Yan-Mei Zhu
  • Publication number: 20120310609
    Abstract: A method for controlling impedance of a multi-layer PCB includes establishing a geometric model using simulation software according to a structure of the multi-layer PCB. A first variable (S) and a second variable (W) are respectively defined in the simulation software. The variable S is set equal to a first desired value. An impedance (R) of the transmission line is set equal to a second desired value. The variable W is set to a value according to a relationship between R, S, and W.
    Type: Application
    Filed: July 29, 2011
    Publication date: December 6, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: HSIN-KUAN WU, HOU-YUAN CHOU
  • Patent number: 8143528
    Abstract: A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: March 27, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Hou-Yuan Chou
  • Publication number: 20120051001
    Abstract: A PCB includes a number of insulation layers, a number of circuit layers, a signal-interfering component, and a signal-sensitive component. The circuit layers and the insulation layers are stacked alternately. The circuit layers include at least two first circuit layers, a second circuit layer, and a ground layer. The ground layer has a first side and a second side facing away the first side. The first circuit layers are positioned near the first side and include an outmost first circuit layer and at least one inner first circuit layer positioned between the outmost first circuit layer and the ground layer. The second circuit layer is positioned near the second side. The signal-interfering component is positioned on the outmost first circuit layer. The signal-sensitive component is positioned on the second circuit layer. Each inner first circuit layer defines a copper-remove area corresponding to an orthogonal projection of the signal-interfering component thereon.
    Type: Application
    Filed: October 31, 2010
    Publication date: March 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY(ShenZhen) CO., LTD.
    Inventors: NING WU, HSIN-KUAN WU, HOU-YUAN CHOU, SHUN-BO BAI, YAN-MEI ZHU
  • Publication number: 20100101850
    Abstract: A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.
    Type: Application
    Filed: November 24, 2008
    Publication date: April 29, 2010
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: HOU-YUAN CHOU