Patents by Inventor Houfei Chen

Houfei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7633773
    Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: December 15, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Houfei Chen
  • Patent number: 7459638
    Abstract: The invention comprises an improved PCB board design having particular utility for high frequency application, and especially useful to alleviate the problem of electromagnetic disturbance of signals switching through power and ground planes. In one embodiment, the PCB contains a magnetically loaded absorbing boundary to absorb the EM disturbances and keep them from resonating inside the cavity between the power and ground planes. The boundary is preferably placed at an edge or edges of the PCB, where it is unlikely to affect any other signals on the PCB. Exemplary materials for the boundary have a magnetic loss tangent of 1.0 to 1.5 with an attenuation constant of ?20 dB/cm over frequencies of interest. Depending on whether the boundary material is solid or non-solid, it may be adhered to the edges of the PCB, or may be applied to the edge and cured.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: December 2, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Houfei Chen, Shiyou Zhao, Hao Wang
  • Publication number: 20070262794
    Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.
    Type: Application
    Filed: May 10, 2006
    Publication date: November 15, 2007
    Inventor: Houfei Chen
  • Publication number: 20070258173
    Abstract: Substrates having power and ground planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a power plane and a ground plane. The noise suppression structure may include a power plane extension that extends from the power plane generally towards the ground plane, and a ground plane extension that extends from the ground plane generally towards the power plane. The ground plane extension may be separated from the power plane extension by a distance that is less than the distance separating the power and ground planes. Electronic device assemblies and systems include such substrates. Methods for suppressing noise in at least one of a power plane and a ground plane include providing such noise suppression structures between power and ground planes.
    Type: Application
    Filed: May 8, 2006
    Publication date: November 8, 2007
    Inventors: Houfei Chen, Shiyou Zhao
  • Publication number: 20070193775
    Abstract: An impedance matching conductive via structure that is effectively constructed by selecting an outer conductor and an inner conductor diameter through analytical calculation or numerical simulation, such that impedance of the conductive via structure is matched to the impedance of the conductive signal traces of a printed circuit board. The conductive via structure comprises a conductive barrel that either connects to multiple ground planes or to multiple powers planes and serves as the outer conductor for a coaxial structure that provides a current return path and a matched impedance path of via transition, thus improving the signal transition and reducing signal reflection due to via discontinuity. Moreover, the conductive barrel of the conductive via structure also reduces radiation loss through a parallel plane structure and suppresses coupling between neighboring vias as the energy escaping through the conductive barrel and radiating to other vias is minimized.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 23, 2007
    Inventors: Houfei Chen, Shiyou Zhao
  • Publication number: 20070038428
    Abstract: A methodology for combining two or more S-parameter blocks/matrices (each representing a circuit or network, or the interconnection between a circuit or network) into a single S-matrix are described. Such a matrix may be beneficially used to simulate the circuit or network represented by the multiply interconnected circuits or networks.
    Type: Application
    Filed: August 9, 2005
    Publication date: February 15, 2007
    Applicant: Micron Technology, Inc.
    Inventor: Houfei Chen
  • Publication number: 20070007031
    Abstract: One embodiment of the invention comprises an improved via structure for use in a printed circuit board (PCB), and method for fabricating the same. The via allows for the passage of a signal from one signal plane to another in the (PCB), and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.
    Type: Application
    Filed: September 19, 2006
    Publication date: January 11, 2007
    Applicant: Micron Technology, Inc.
    Inventors: Shiyou Zhao, Houfei Chen, Hao Wang
  • Patent number: 7149666
    Abstract: Analyzing interactions between vias in multilayered electronic packages that include at least two spaced-apart conducting planes, and multiple vias that connect signal traces on different layers. Voltages at active via ports are represented as magnetic ring current sources, which generate electromagnetic modes inside the plane structure. Substantial electromagnetic coupling between vias occurs. A full-wave solution of multiple scattering among cylindrical vias in planar waveguides is derived using Foldy-Lax equations. By using the equivalence principle, the coupling is decomposed into interior and exterior problems. For the interior problem, the dyadic Green's function is expressed in terms of vector cylindrical waves and waveguide modes. The Foldy-Lax equations for multiple scattering among the cylindrical vias are applied, and waveguide modes are decoupled in the Foldy-Lax equations.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: December 12, 2006
    Assignee: University of Washington
    Inventors: Leung Tsang, Houfei Chen, Chungchi Huang, Vikram Jandhyala
  • Publication number: 20060237227
    Abstract: One embodiment of the invention comprises an improved via structure for use in a printed circuit board (PCB), and method for fabricating the same. The via allows for the passage of a signal from one signal plane to another in the (PCB), and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.
    Type: Application
    Filed: April 26, 2005
    Publication date: October 26, 2006
    Inventors: Shiyou Zhao, Houfei Chen, Hao Wang
  • Publication number: 20060237223
    Abstract: The invention comprises an improved PCB board design having particular utility for high frequency application, and especially useful to alleviate the problem of electromagnetic disturbance of signals switching through power and ground planes. In one embodiment, the PCB contains a magnetically loaded absorbing boundary to absorb the EM disturbances and keep them from resonating inside the cavity between the power and ground planes. The boundary is preferably placed at an edge or edges of the PCB, where it is unlikely to affect any other signals on the PCB. Exemplary materials for the boundary have a magnetic loss tangent of 1.0 to 1.5 with an attenuation constant of ?20 dB/cm over frequencies of interest. Depending on whether the boundary material is solid or non-solid, it may be adhered to the edges of the PCB, or may be applied to the edge and cured.
    Type: Application
    Filed: April 26, 2005
    Publication date: October 26, 2006
    Inventors: Houfei Chen, Shiyou Zhao, Hao Wang
  • Publication number: 20030072130
    Abstract: Analyzing interactions between vias in multilayered electronic packages that include at least two spaced-apart conducting planes, and multiple vias that connect signal traces on different layers. Voltages at active via ports are represented as magnetic ring current sources, which generate electromagnetic modes inside the plane structure. Substantial electromagnetic coupling between vias occurs. A full-wave solution of multiple scattering among cylindrical vias in planar waveguides is derived using Foldy-Lax equations. By using the equivalence principle, the coupling is decomposed into interior and exterior problems. For the interior problem, the dyadic Green's function is expressed in terms of vector cylindrical waves and waveguide modes. The Foldy-Lax equations for multiple scattering among the cylindrical vias are applied, and waveguide modes are decoupled in the Foldy-Lax equations.
    Type: Application
    Filed: May 30, 2002
    Publication date: April 17, 2003
    Applicant: University of Washington
    Inventors: Leung Tsang, Houfei Chen, Chungchi Huang, Vikram Jandhyala