Abstract: The embodiments disclose a system and method including a random number generator coupled to the randomized machine learning-based malware detector configured for determining changes of settings and selections of parameters, candidate classifiers integrated with the randomized machine learning-based malware detector and configured to be initiated by a random number to avoid transferable learning, a set of feature combinations for random feature selection including monitoring granularity and detection prediction latency and a random number for identifying a set of feature combinations that minimize the overhead and maintain enough variance in data for baffling the malware adversarial attacks.

Abstract: The embodiments disclose a system and method including a side-channel attack detection framework comprising a data detector and a distribution detector configured for detecting known and unknown side-channel attack on a user's computer, a data detector configured for constantly monitoring the user's computer microarchitectural features activities in real-time, wherein the data detector includes a machine learning-based classification system and a distribution detector data distribution model configured for detecting both known and unknown emerging side-channel attacks in real-time.

Abstract: The embodiments disclose a system and method including a random number generator coupled to the randomized machine learning-based malware detector configured for determining changes of settings and selections of parameters, candidate classifiers integrated with the randomized machine learning-based malware detector and configured to be initiated by a random number to avoid transferable learning, a set of feature combinations for random feature selection including monitoring granularity and detection prediction latency and a random number for identifying a set of feature combinations that minimize the overhead and maintain enough variance in data for baffling the malware adversarial attacks.

Abstract: A real-time workload scheduling heuristic assigns tasks to the cores such that the total load current consumption of the cores is always less than the total current capability of the under-provisioned on-chip voltage regulators. In addition, the energy-efficient scheduling of the tasks on to the cores ensures that the reconfiguration of the power delivery network is minimized. The heuristic includes DVFS management based on the unique constraints of the under provisioned voltage regulators.

Abstract: Provided are methods, systems, devices of a security-driven design method. The present methods and systems can enable integration of security requirements in the early stages of design along with other design constrains so that potential attacks during IC development, usage, and retirement would render ineffectual. Example methods and systems can comprise circuits and circuit design using vanishable logic through a novel hybrid design method. An example method or system can comprise vanishable logic based on hardware re-configuration and transformation by employing non-volatile memory cells.

Abstract: A real-time workload scheduling heuristic assigns tasks to the cores such that the total load current consumption of the cores is always less than the total current capability of the under-provisioned on-chip voltage regulators. In addition, the energy-efficient scheduling of the tasks on to the cores ensures that the reconfiguration of the power delivery network is minimized. The heuristic includes DVFS management based on the unique constraints of the under provisioned voltage regulators.

Abstract: Provided are methods, systems, devices of a security-driven design method. The present methods and systems can enable integration of security requirements in the early stages of design along with other design constrains so that potential attacks during IC development, usage, and retirement would render ineffectual. Example methods and systems can comprise circuits and circuit design using vanishable logic through a novel hybrid design method. An example method or system can comprise vanishable logic based on hardware re-configuration and transformation by employing non-volatile memory cells.