Abstract: A method that forms a sacrificial fill material that can be selectively removed for forming a backside contact via for a transistor backside power rail. In some embodiments, the method may include performing an etching process on a substrate with an opening that is conformally coated with an oxide layer, wherein the etching process is an anisotropic dry etch process using a chlorine gas to remove the oxide layer from a field of the substrate and only from a bottom portion of the opening, and wherein the etching process forms a partial oxide spacer in the opening and increases a depth of the opening and epitaxially growing the sacrificial fill material in the opening by flowing a hydrogen chloride gas at a rate of approximately 60 sccm to approximately 90 sccm in a chamber pressure of approximately 1 Torr to approximately 100 Torr.

Abstract: Methods of controlling an across-wafer profile of a semiconductor process, as well as related systems and computer program products. A target profile of a semiconductor process over a radius of a wafer is fit to a polynomial. A plurality of gain matrices between a first plurality of process inputs and a plurality of polynomial coefficients of the polynomial are determined. An offset is estimated between the plurality of polynomial coefficients and an effect of the first plurality of process inputs. An objective function is defined as an integral of a squared deviation between an estimated profile and the target profile over the radius of the wafer. A second plurality of process inputs are mapped to the objective function by vector convolution using the plurality of gain matrices. The objective function is solved to optimize the second plurality of process inputs.