Patents by Inventor How-Cheng Tsai

How-Cheng Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7055532
    Abstract: The process of the present invention comprises reactive ion etching of AlxFyOz oxide deposits on aluminum-containing bond pads using feed gases, such as, SF6/CF4/Ar or Cl2/BCL3/Ar. whose active plasma etches the AlxFyOz oxide deposits by physical etching and chemical etching for more complete removal of the AlxFyOz oxide deposits.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: June 6, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: How-Cheng Tsai, Hung-Hsin Liu
  • Publication number: 20050136662
    Abstract: The process of the present invention comprises reactive ion etching of AlxFyOz oxide deposits on aluminum-containing bond pads using feed gases, such as, SF6/CF4/Ar or Cl2/BCL3/Ar. whose active plasma etches the AlxFyOz oxide deposits by physical etching and chemical etching for more complete removal of the AlxFyOz oxide deposits.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: How-Cheng Tsai, Hung-Hsin Liu
  • Patent number: 6818555
    Abstract: A method for a metal etchback process to form a metal filled semiconductor feature having improved planarity and electrical resistance including a semiconductor wafer having an etched opening lined with a refractory metal containing layer and a blanket deposited metal layer filling the etched opening; spin coating a spin on layer selected from the group consisting of an organic resinous layer and a spin-on glass layer over the metal layer; dry etching in a first etchback process to remove a first portion of the SOL layer to reveal a portion of the metal layer leaving a second portion of the SOL layer overlying the etched opening; dry etching in a second etchback process to remove the metal layer to reveal a portion of the refractory metal containing layer; and, removing the second portion of the SOL layer to form a substantially planar metal filled etched opening.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: November 16, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: How-Cheng Tsai, Hung-Hsin Liu, Chung-Daw Young, Ming-Kuo Yu
  • Publication number: 20040067633
    Abstract: A method for a metal etchback process to form a metal filled semiconductor feature having improved planarity and electrical resistance including a semiconductor wafer having an etched opening lined with a refractory metal containing layer and a blanket deposited metal layer filling the etched opening; spin coating a spin on layer selected from the group consisting of an organic resinous layer and a spin-on glass layer over the metal layer; dry etching in a first etchback process to remove a first portion of the SOL layer to reveal a portion of the metal layer leaving a second portion of the SOL layer overlying the etched opening; dry etching in a second etchback process to remove the metal layer to reveal a portion of the refractory metal containing layer; and, removing the second portion of the SOL layer to form a substantially planar metal filled etched opening.
    Type: Application
    Filed: October 7, 2002
    Publication date: April 8, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: How-Cheng Tsai, Hung-Hsin Liu, Chung-Daw Young, Ming-Kuo Yu
  • Patent number: 6706601
    Abstract: A method of forming very small silicon nitride spacers in split-gate flash EPROMs is disclosed which prevent the occurrence of “write disturb”, unwanted reverse tunneling, or erasing. This is accomplished by forming spacers with well controlled dimensions and well defined shapes through a judicious combination of dry etch with wet over-etch technique. The wet etch along with the dry etch widens the process window from a few seconds to several minutes so that the small dimensioned silicon nitride spacers can be better controlled than it has been possible in the past. In a second embodiment, the step of over-etching of the spacers is combined with the step of stripping off of an implant photomask, thus, shortening the manufacturing product cycle.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: March 16, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hung-Hsin Liu, Kwang-Chen Wu, How-Cheng Tsai, Yuan-Ko Hwang, Shih-Shun Chen