Patents by Inventor Howard A. Wilson

Howard A. Wilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10278889
    Abstract: A modular self-massaging apparatus includes a framework and a ball assembly mounted to the framework. The ball assembly is modular and can be disassembled and reassembled in a variety of configurations. The apparatus is modular because the ball assembly and other ball assemblies can be applied to and carried in the apparatus at a variety of locations across the apparatus.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: May 7, 2019
    Inventors: Craig A. Olschansky, William R. Hanson, Donald Hollenbeck, Howard A. Wilson, IV
  • Publication number: 20170231862
    Abstract: A modular self-massaging apparatus includes a framework and a ball assembly mounted to the framework. The ball assembly is modular and can be disassembled and reassembled in a variety of configurations. The apparatus is modular because the ball assembly and other ball assemblies can be applied to and carried in the apparatus at a variety of locations across the apparatus.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 17, 2017
    Inventors: Craig A. Olschansky, William R. Hanson, Donald Hollenbeck, Howard A. Wilson, IV
  • Publication number: 20160170456
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: September 25, 2012
    Publication date: June 16, 2016
    Applicant: INTEL CORPORATION
    Inventors: Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Publication number: 20140089687
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 27, 2014
    Inventors: Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Patent number: 8288846
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 16, 2012
    Assignee: Intel Corporation
    Inventors: Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Publication number: 20100219516
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: February 24, 2010
    Publication date: September 2, 2010
    Inventors: Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Patent number: 7782887
    Abstract: An apparatus for driver power and size selection includes in one embodiment a controller for controlling the enabling and disabling of legs in a legged driver, the legged driver providing only that amount of power necessary to transfer a data packet from its current location to its destination location. A method of forwarding data packets includes determining the distance between a current location of a data packet and the destination location of the data packet, and enabling as many legs of a legged driver as are necessary to power the transfer of the data packet to its destination.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: August 24, 2010
    Assignee: Intel Corporation
    Inventors: Sriram R. Vangal, Howard A. Wilson
  • Publication number: 20100115301
    Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: January 8, 2010
    Publication date: May 6, 2010
    Inventors: Siva G. Narendra, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Patent number: 7698576
    Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: April 13, 2010
    Assignee: Intel Corporation
    Inventors: Siva G. Narendra, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Patent number: 7671456
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: March 2, 2010
    Assignee: Intel Corporation
    Inventors: Siva G. Narendra, James W. Tschantz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Patent number: 7247930
    Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a power management die bonded to the CPU die in a three dimensional packaging layout.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: July 24, 2007
    Assignee: Intel Corporation
    Inventors: Siva G. Narendra, James W. Tschantz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Patent number: 6853644
    Abstract: An apparatus for driver power and size selection includes in one embodiment a controller for controlling the enabling and disabling of legs in a legged driver, the legged driver providing only that amount of power necessary to transfer a data packet from its current location to its destination location. A method of forwarding data packets includes determining the distance between a current location of a data packet and the destination location of the data packet, and enabling as many legs of a legged driver as are necessary to power the transfer of the data packet to its destination.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: February 8, 2005
    Assignee: Intel Corporation
    Inventors: Sriram R. Vangal, Howard A. Wilson
  • Patent number: 4989170
    Abstract: The present invention provides a technique for updating the coefficients a(n) of an adaptive filter impulse response A(n), whereA'(n)=(a.sub.o (n) a.sub.l (n) . . . a.sub.m (n))is the adaptive filter impulse response at time n. The impulse response is utilized for tracking the output y(n) of a communications channel, where ##EQU1## where H is an unknown impulse response of the channel,H'=(h.sub.o h.sub.l . . . h.sub.m),the ' character denoting transposition. The channel is driven with a known input signal s(n), whereS'(n)=(s(n) s(n-l) . . . s(n-m)).According to the techinque, the output x(n) of an adaptive filter, wherex(n)=S'(n)A(n)is compared with the channel output y(n) according to the Least Mean Squares (LMS) algorithm to develop an LMS error prediction signal. At the same time, the adaptive filter output x(n) is compared with the channel output y(n) according to the Sign Algorithm (SA) to develop an SA error prediction signal.
    Type: Grant
    Filed: February 8, 1990
    Date of Patent: January 29, 1991
    Assignee: National Semiconductor Corporation
    Inventors: Roy G. Batruni, Howard A. Wilson
  • Patent number: 4926472
    Abstract: The present invention provides a technique for data detection signal processing for removing echo interference and/or distortion from a received 2B1Q coded signal. According to the preferred technique, the received 2B1Q signal Q, where q=(-3, -1, +1, +3), is shifted one bit to the left to generate a corresponding shifted symbol alphabet S, where S=(-2, 0, +2, +4). The shifted received signals are then processed through a transversal filter. That is, the signal is provided to a delay line which is tapped at intervals corresponding to the symbol width of the received signal. Each tap along the delay line is connected through an amplifier to a summing device that provides an output y(n), where ##EQU1## The tap gains, or coefficients a.sub.j, are set to subtract the effects of interference from symbols that are adjacent in time to the desired symbol. In an adaptive embodiment of the invention, the output y(n) resulting from the convolution between the transmitted symbols s(n) and the gain coefficients a.sub.j.
    Type: Grant
    Filed: November 10, 1988
    Date of Patent: May 15, 1990
    Assignee: National Semiconductor Corporation
    Inventors: Roy G. Batruni, Howard A. Wilson