Abstract: A nanophononic metamaterial-based thermoelectric energy conversion device and processes for fabricating a nanophononic metamaterial-based thermoelectric energy conversion device is provided. In one implementation, for example, a nanophononic metamaterial-based thermoelectric energy conversion device includes a first conductive pad, a second conductive pad, and a plurality of strip units. In one implementation, the first conductive pad is coupled to a first connection of the thermoelectric energy conversion device, and the second conductive pad is coupled to a second connection of the thermoelectric energy conversion device. The plurality of strip units are connected in series between the first and second conductive pads and provide a parallel heat transfer pathway. The strip units include a nanostructure design comprising a nanophononic metamaterial.

Abstract: A nanophononic metamaterial-based thermoelectric energy conversion device and processes for fabricating a nanophononic metamaterial-based thermoelectric energy conversion device is provided. In one implementation, for example, a nanophononic metamaterial-based thermoelectric energy conversion device includes a first conductive pad, a second conductive pad, and a plurality of strip units. In one implementation, the first conductive pad is coupled to a first connection of the thermoelectric energy conversion device, and the second conductive pad is coupled to a second connection of the thermoelectric energy conversion device. The plurality of strip units are connected in series between the first and second conductive pads and provide a parallel heat transfer pathway. The strip units include a nanostructure design comprising a nanophononic metamaterial.

Abstract: A method (300) for etching a silicon surface (116) to reduce reflectivity. The method (300) includes electroless deposition of copper nanoparticles about 20 nanometers in size on the silicon surface (116), with a particle-to-particle spacing of 3 to 8 nanometers. The method (300) includes positioning (310) the substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The silicon surface (116) is etched (350) by agitating the etching solution (124) with, for example, ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116). During the etching, copper nanoparticles enhance or drive the etching process.

Abstract: A method (300) for etching a silicon surface (116) to reduce reflectivity. The method (300) includes electroless deposition of copper nanoparticles about 20 nanometers in size on the silicon surface (116), with a particle-to-particle spacing of 3 to 8 nanometers. The method (300) includes positioning (310) the substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The silicon surface (116) is etched (350) by agitating the etching solution (124) with, for example, ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116). During the etching, copper nanoparticles enhance or drive the etching process.

Abstract: Exemplary embodiments are disclosed of anti-reflective nanoporous silicon for efficient hydrogen production by photoelectrolysis of water. A nanoporous black Si is disclosed as an efficient photocathode for H2 production from water splitting half-reaction.

Abstract: A method (300) of texturing silicon surfaces (116) such to reduce reflectivity of a silicon wafer (110) for use in solar cells. The method (300) includes filling (330, 340) a vessel (122) with a volume of an etching solution (124) so as to cover the silicon surface 116) of a wafer or substrate (112). The etching solution (124) is made up of a catalytic nanomaterial (140) and an oxidant-etchant solution (146). The catalytic nanomaterial (140) may include gold or silver nanoparticles or noble metal nanoparticles, each of which may be a colloidal solution. The oxidant-etchant solution (146) includes an etching agent (142), such as hydrofluoric acid, and an oxidizing agent (144), such as hydrogen peroxide. Etching (350) is performed for a period of time including agitating or stirring the etching solution (124). The etch time may be selected such that the etched silicon surface (116) has a reflectivity of less than about 15 percent such as 1 to 10 percent in a 350 to 1000 nanometer wavelength range.

Abstract: A method (300) for etching a silicon surface (116). The method (300) includes positioning (310) a substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (330, 340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes a catalytic solution (140) and an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The catalytic solution (140) may be a solution that provides metal-containing molecules or ionic species of catalytic metals. The silicon surface (116) is etched (350) by agitating the etching solution (124) in the vessel (122) such as with ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116).

Abstract: A crystalline, highly textured or biaxially textured, foreign (non-silicon) material, which is closely lattice-matched to silicon, is deposited on a glass or other amorphous or multi-crystalline substrate to provide a template for hetero-epitaxial growth of highly ordered crystalline silicon semiconductor layers on such substrates. This process enables crystalline silicon semiconductor devices, such as photovoltaic devices, transistors, and the like, on such inexpensive substrates, or to enable reduced temperature processing for some kinds of semiconductor devices, such as bottom gate transistors, on crystalline silicon substrates.