Patents by Inventor Howard C. Nicholls

Howard C. Nicholls has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5602055
    Abstract: A semiconductor device comprising a silicon substrate, an oxide layer on the silicon substrate, a doped polysilicon region disposed on the oxide layer, a dielectric layer which has been deposited over the doped polysilicon region and the silicon substrate, a contact hole which is formed in the dielectric layer and extends over respective laterally adjacent portions of the doped polysilicon region and the silicon substrate and a contact which has been selectively deposited in the contact hole which electrically connects the said portions together.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 11, 1997
    Assignee: Inmos Limited
    Inventors: Howard C. Nicholls, Michael J. Norrington
  • Patent number: 5587339
    Abstract: A method of fabricating a semiconductor device incorporating a via and an interconnect layer of aluminium or aluminium alloy. The invention provides a semiconductor device including a via and an interconnect layer of aluminium or aluminium alloy, a capping layer of electrically conductive material which has been formed over the interconnect layer and an electrically conductive contact which has been selectively deposited on the capping layer thereby to form a via, the materials of the capping layer and of the contact being selected whereby at the interface therebetween there is substantial absence of non-conductive compounds formed from the material of the capping layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 24, 1996
    Assignee: SGS-Thomson Microelectronics Ltd.
    Inventors: Graeme M. Wyborn, Howard C. Nicholls
  • Patent number: 5541434
    Abstract: A semiconductor device comprising a silicon substrate, an oxide layer on the silicon substrate, a doped polysilicon region disposed on the oxide layer, a dielectric layer which has been deposited over the doped polysilicon region and the silicon substrate, a contact hole which is formed in the dielectric layer and extends over respective laterally adjacent portions of the doped polysilicon region and the silicon substrate and a contact which has been selectively deposited in the contact hole which electrically connects the said portions together.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: July 30, 1996
    Assignee: Inmos Limited
    Inventors: Howard C. Nicholls, Michael J. Norrington
  • Patent number: 5422308
    Abstract: A method of fabricating a tungsten contact in a semiconductor device comprises providing an oxide layer on a region of a silicon substrate; depositing a sealing dielectric layer over the oxide layer; and depositing an interlevel dielectric layer over the sealing layer. The interlevel dielectric layer, the sealing dielectric layer and the oxide layer are then etched through as far as the substrate thereby to form a contact hole and to expose the said region. A dopant is implanted into the said region whereby the implanted dopant is self-aligned to the contact hole. The substrate is thermally annealed. Tungsten is selectively deposited in the contact hole and an interconnect layer is deposited over the deposited tungsten contact. The invention also provides a semiconductor device which incorporates a tungsten contact and which can be fabricated by the method.
    Type: Grant
    Filed: December 6, 1993
    Date of Patent: June 6, 1995
    Assignee: Inmos Limited
    Inventors: Howard C. Nicholls, Michael J. Norrington, Michael K. Thompson