Patents by Inventor Howard Cam Luong
Howard Cam Luong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9912320Abstract: An exponentially-scaling switched impedance circuit includes: two or more impedance scaling circuits, wherein each impedance scaling circuit comprises: an input port; an output port; and a switched impedance circuit connected in parallel to the output port. Each impedance scaling circuit is configured to provide an effective impedance at the input port corresponding to a scaled-down version of the exponentially-scaling switched impedance circuit. The two or more impedance scaling circuits are connected in a cascade such that an input of an impedance scaling circuit is connected to an output of a previous impedance scaling circuit and/or an output of the impedance scaling circuit is connected to an input of a next impedance scaling circuit.Type: GrantFiled: June 13, 2016Date of Patent: March 6, 2018Assignee: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Zhiqiang Huang
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Publication number: 20170359052Abstract: An exponentially-scaling switched impedance circuit includes: two or more impedance scaling circuits, wherein each impedance scaling circuit comprises: an input port; an output port; and a switched impedance circuit connected in parallel to the output port. Each impedance scaling circuit is configured to provide an effective impedance at the input port corresponding to a scaled-down version of the exponentially-scaling switched impedance circuit. The two or more impedance scaling circuits are connected in a cascade such that an input of an impedance scaling circuit is connected to an output of a previous impedance scaling circuit and/or an output of the impedance scaling circuit is connected to an input of a next impedance scaling circuit.Type: ApplicationFiled: June 13, 2016Publication date: December 14, 2017Inventors: Howard Cam Luong, Zhiqiang Huang
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Patent number: 8931953Abstract: The present invention provides an ultra-low power embedded CMOS temperature sensor based on serially connected subthreshold MOS operation particularly well suited for passive RFID food monitoring applications. Employing serially connected subthreshold MOS as sensing element enables reduced minimum supply voltage for further power reduction, which is very important in passive RFID applications. The temperature sensor may be part of a passive RFID tag and incorporates a temperature sensor core, proportional-to-absolute-temperature (PTAT) and complimentary-to-absolute-temperature (CTAT) delay generators, and a time-to-digital differential readout circuit. In one embodiment, the sensor is embedded inside a passive UHF RFID tag fabricated with a conventional 0.18 ?m 1P6M CMOS process. With the sensor core working under 0.5 V and digital interfacing under 1 V, the sensor dissipates a measured total power of 119 nW at 33 samples/s and achieves an inaccuracy of +1/?0.8° C. from ?10° C. to 30° C. after calibration.Type: GrantFiled: May 27, 2011Date of Patent: January 13, 2015Assignee: The Hong Kong University of Science and TechnologyInventors: Man Kay Law, Amine Bermak, Howard Cam Luong
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Patent number: 8339208Abstract: A tunable multiphase ring oscillator includes a plurality of stages connected in series in a ring structure, where each stage generating a stage output from a stage input. Each stage of the tunable multiphase ring oscillator includes a plurality of trans-conductance cells, each generating an output from at least one portion of the stage input. Each stage further includes at least one phase shifting module for imparting at least one phase shift to the at least one portion of the stage input, an oscillator unit for generating the stage output from a combination of the plurality of outputs, and means for varying at least one of the plurality outputs so as to adjust a phase of the stage output.Type: GrantFiled: June 8, 2010Date of Patent: December 25, 2012Assignee: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Sujiang Rong
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Patent number: 8140039Abstract: The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesizer or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimized or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.Type: GrantFiled: September 10, 2007Date of Patent: March 20, 2012Assignee: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Hui Zheng
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Publication number: 20110298549Abstract: A tunable multiphase ring oscillator includes a plurality of stages connected in series in a ring structure, where each stage generating a stage output from a stage input. Each stage of the tunable multiphase ring oscillator includes a plurality of trans-conductance cells, each generating an output from at least one portion of the stage input. Each stage further includes at least one phase shifting module for imparting at least one phase shift to the at least one portion of the stage input, an oscillator unit for generating the stage output from a combination of the plurality of outputs, and means for varying at least one of the plurality outputs so as to adjust a phase of the stage output.Type: ApplicationFiled: June 8, 2010Publication date: December 8, 2011Applicant: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Sujiang Rong
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Publication number: 20110291807Abstract: The present invention provides an ultra-low power embedded CMOS temperature sensor based on serially connected subthreshold MOS operation particularly well suited for passive RFID food monitoring applications. Employing serially connected subthreshold MOS as sensing element enables reduced minimum supply voltage for further power reduction, which is very important in passive RFID applications. The temperature sensor may be part of a passive RFID tag and incorporates a temperature sensor core, proportional-to-absolute-temperature (PTAT) and complimentary-to-absolute-temperature (CTAT) delay generators, and a time-to-digital differential readout circuit. In one embodiment, the sensor is embedded inside a passive UHF RFID tag fabricated with a conventional 0.18 ?m 1P6M CMOS process. With the sensor core working under 0.5 V and digital interfacing under 1 V, the sensor dissipates a measured total power of 119 nW at 33 samples/s and achieves an inaccuracy of +1/?0.8° C. from ?10° C. to 30° C. after calibration.Type: ApplicationFiled: May 27, 2011Publication date: December 1, 2011Applicant: The Hong Kong University of Science and TechnologyInventors: Man Kay Law, Amine Bermak, Howard Cam Luong
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Patent number: 7961058Abstract: A locking range enhancement technique is described that steers away part of the DC current and reuses it to generate more injected AC current to the injection-locked resonator-based frequency dividers (ILFDs). The injection-enhanced ILFDs maintain the key features of ILFDs, which are high speed and low power consumption, without requiring any extra inductive component and thus extra chip area.Type: GrantFiled: May 29, 2009Date of Patent: June 14, 2011Assignee: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Sujiang Rong
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Publication number: 20100301955Abstract: A locking range enhancement technique is described that steers away part of the DC current and reuses it to generate more injected AC current to the injection-locked resonator-based frequency dividers (ILFDs). The injection-enhanced ILFDs maintain the key features of ILFDs, which are high speed and low power consumption, without requiring any extra inductive component and thus extra chip area.Type: ApplicationFiled: May 29, 2009Publication date: December 2, 2010Applicant: The Hong Kong University of Science and TechnologyInventors: Howard Cam LUONG, Sujiang RONG
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Patent number: 7652541Abstract: A novel form of an integrated variable inductor uses an on-chip transformer together with a variable capacitor. The variable capacitor can either be a varactor or a switched capacitor array and is connected to the secondary coil of the transformer. By changing the capacitance at the secondary coil of a transformer, the equivalent inductance looking into the primary coil of the transformer can be adjusted. With another capacitor in parallel to the primary coil, two different modes of resonance inherently exist, and a very wide frequency tuning range can be achieved by combining the two modes.Type: GrantFiled: August 2, 2007Date of Patent: January 26, 2010Assignee: The Hong Kong University of Sciences and TechnologyInventors: Howard Cam Luong, Lai Kan Leung
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Publication number: 20090068975Abstract: The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesiser or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimised or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.Type: ApplicationFiled: September 10, 2007Publication date: March 12, 2009Applicant: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Hui Zheng
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Patent number: 7411468Abstract: There is a disclosed an oscillator for generating a periodic signal, comprising a transistor and two electro-magnetically coupled inductors in positive feedback configuration, one of the inductors is connected to the drain or gate of the transistor, and the other being connected to the source to maintain the same phase of the two voltages at the two nodes. Two or more of such single ended oscillators can be connected together to form a differential oscillator, and the invention can be generalized by the use of any active device and not just transistors.Type: GrantFiled: August 29, 2003Date of Patent: August 12, 2008Assignee: Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Ka-Chun Kwok
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Patent number: 7268634Abstract: A novel form of an integrated variable inductor uses an on-chip transformer together with a variable capacitor. The variable capacitor can either be a varactor or a switched capacitor array and is connected to the secondary coil of the transformer. By changing the capacitance at the secondary coil of a transformer, the equivalent inductance looking into the primary coil of the transformer can be adjusted. With another capacitor in parallel to the primary coil, two different modes of resonance inherently exist, and a very wide frequency tuning range can be achieved by combining the two modes.Type: GrantFiled: August 27, 2004Date of Patent: September 11, 2007Assignee: The Hong Kong University of Science and TechnologyInventors: Howard Cam Luong, Lai Kan Leung
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Patent number: 6831489Abstract: A frequency divider circuit is disclosed that generates output signals having a frequency substantially half of the frequency of the input signal. The circuit comprises two D-Flip-Flop circuits wherein one employs the said input signal and the other one employs the complement of the said input signal, and each of the two D-Flip-Flop circuits consists of a pair of loading transistors, two regenerative pairs coupled with each others, and two common-gate switches.Type: GrantFiled: May 21, 2003Date of Patent: December 14, 2004Assignee: The Hong Kong University of Science and TechnologyInventors: Sin-Luen Cheung, Man-Chun Wong, Howard Cam Luong
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Publication number: 20040012416Abstract: A frequency divider circuit is disclosed that generates output signals having a frequency substantially half of the frequency of the input signal. The circuit comprises two D-Flip-Flop circuits wherein one employs the said input signal and the other one employs the complement of the said input signal, and each of the two D-Flip-Flop circuits consists of a pair of loading transistors, two regenerative pairs coupled with each others, and two common-gate switches.Type: ApplicationFiled: May 21, 2003Publication date: January 22, 2004Applicant: The Hong Kong University of Science and TechnologyInventors: Sin-Luen Cheung, Man-Chun Wong, Howard Cam Luong
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Patent number: 6538519Abstract: A phase locked loop wherein the voltage controlled oscillator is controlled by the output of a phase comparison circuit through a split loop filter. The oscillator has two varactors in parallel in its tuning circuit. The first branch of the loop filter includes an integrator filter generating a first error voltage and the second branch includes a low pass filter generating a second error voltage. The first error voltage controls one varactor and the second error voltage controls the other varactor. As a result the error voltages are effectively summed in the capacitance domain to obviate the need for a dedicated error voltage adder and to allow the total capacitance required in the loop filter to be reduced while still retaining an adequate signal to noise ratio in the filter.Type: GrantFiled: October 12, 2001Date of Patent: March 25, 2003Assignee: The Hong Kong University of Science and TechnologyInventors: Chi Wa Lo, Howard Cam Luong
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Publication number: 20020075091Abstract: A phase locked loop wherein the voltage controlled oscillator is controlled by the output of a phase comparison circuit through a split loop filter. The oscillator has two varactors in parallel in its tuning circuit. The first branch of the loop filter includes an integrator filter generating a first error voltage and the second branch includes a low pass filter generating a second error voltage.Type: ApplicationFiled: October 12, 2001Publication date: June 20, 2002Inventors: Chi Wa Lo, Howard Cam Luong
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Patent number: 6344767Abstract: A switched capacitor circuit is described that uses two switchable operational amplifiers that operate in parallel and in alternate clock phases. In a preferred embodiment of the invention, the two operational amplifiers may be implemented by a single two-stage operational amplifier having a common input stage and two switchable output pairs. The novel switched capacitor circuit may be used in any application that uses a conventional switched capacitor circuit, such as an integrator and a filter means.Type: GrantFiled: January 28, 2000Date of Patent: February 5, 2002Assignee: The Hong Kong University of Science and TechnologyInventors: Sin-Luen Cheung, Howard Cam Luong