Abstract: Transconductance (gm)-cell based circuitry is well suited for low power, low voltage complementary metal oxide silicon (CMOS) design in deep sub micro technology. This circuitry includes a gm cell as the basic building block. As such, it is desirable to have the transconductance of the gm cell to be constant against temperature and process corners. The present disclosure describes various gm-cell based circuitry having a controllable transconductance. Preferably, the controllable transconductance can be selectively controlled to be equal to the inverse of the value of an on-chip resistor. For example, the gm-cell based circuitry can sense the transconductance of an internal replica unit and can use negative feedback circuitry to cause this transconductance to be approximately equal a value of an on-chip resistor. However, in some situations, a value of this on-chip resistor is not accurately controlled.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.

Abstract: Transconductance (gm)-cell based circuitry is well suited for low power, low voltage complementary metal oxide silicon (CMOS) design in deep sub micro technology. This circuitry includes a gm cell as the basic building block. As such, it is desirable to have the transconductance of the gm cell to be constant against temperature and process corners. The present disclosure describes various gm-cell based circuitry having a controllable transconductance. Preferably, the controllable transconductance can be selectively controlled to be equal to the inverse of the value of an on-chip resistor. For example, the gm-cell based circuitry can sense the transconductance of an internal replica unit and can use negative feedback circuitry to cause this transconductance to be approximately equal a value of an on-chip resistor. However, in some situations, a value of this on-chip resistor is not accurately controlled.

Abstract: The subject invention provides novel uses of cytoplasmic c-Myc for modulation of innate immune responses. The invention is based, at least in part, on the surprising discovery that cytoplasmic c-Myc, instead of nuclear c-Myc, modulates pro-inflammatory immune responses via its role as a positive feedback regulator. Specifically, the subject invention provides methods for treatment or amelioration of inflammatory diseases and/or immune disorders via inhibition c-Myc expression or its activity. Also provided are methods for the development of therapeutic agents for treating infection, inflammation, immune diseases and autoimmune diseases.