Patents by Inventor Howard Ge

Howard Ge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for determining leak rate through a bond line of a MEMS device
    Patent number: 8579502
    Abstract: A method for optimizing direct wafer bond line width for reduction of parasitic capacitance in a MEMS device by reducing the width of a bond line between a first and a second wafer, exposing the MEMS device to a water vapor for a predetermined time period and at a first temperature capable of evaporating water, cooling the MEMS device at a second temperature capable of freezing the water, and operating the MEMS device at a third temperature capable of freezing the water to determine if there is discontinuity during operation.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: November 12, 2013
    Assignee: Northrop Grumman Corporation
    Inventors: Henry C. Abbink, Gabriel M. Kuhn, Howard Ge, Daryl Sakaida
  • METHOD FOR DETERMINING LEAK RATE THROUGH A BOND LINE OF A MEMS DEVICE
    Publication number: 20110271744
    Abstract: A method for optimizing direct wafer bond line width for reduction of parasitic capacitance in a MEMS device by reducing the width of a bond line between a first and a second wafer, exposing the MEMS device to a water vapor for a predetermined time period and at a first temperature capable of evaporating water, cooling the MEMS device at a second temperature capable of freezing the water, and operating the MEMS device at a third temperature capable of freezing the water to determine if there is discontinuity during operation.
    Type: Application
    Filed: July 19, 2011
    Publication date: November 10, 2011
    Applicant: Northrop Grumman Systems Corporation
    Inventors: Henry C. Abbink, Gabriel M. Kuhn, Howard Ge, Daryl Sakaida
  • Method for optimizing direct wafer bond line width for reduction of parasitic capacitance in MEMS accelerometers
    Patent number: 8007166
    Abstract: A method for optimizing direct wafer bond line width for reduction of parasitic capacitance in a MEMS device by reducing the width of a bond line between a first and a second wafer, exposing the MEMS device to a water vapor for a predetermined time period and at a first temperature capable of evaporating water, cooling the MEMS device at a second temperature capable of freezing the water, and operating the MEMS device at a third temperature capable of freezing the water to determine if there is discontinuity during operation.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: August 30, 2011
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Henry C. Abbink, Gabriel M. Kuhn, Howard Ge, Daryl Sakaida
  • Method for Optimizing Direct Wafer Bond Line Width for Reduction of Parasitic Capacitance in Mems Accelerometers
    Publication number: 20080184778
    Abstract: A method for optimizing direct wafer bond line width for reduction of parasitic capacitance in a MEMS device by reducing the width of a bond line between a first and a second wafer, exposing the MEMS device to a water vapor for a predetermined time period and at a first temperature capable of evaporating water, cooling the MEMS device at a second temperature capable of freezing the water, and operating the MEMS device at a third temperature capable of freezing the water to determine if there is discontinuity during operation.
    Type: Application
    Filed: May 24, 2006
    Publication date: August 7, 2008
    Applicant: Northrop Grumman Corporation
    Inventors: Henry C. Abbink, Gabriel M. Kuln, Howard Ge, Daryl Sakaida
  • Photoresist coating process for microlithography
    Publication number: 20050074552
    Abstract: A photoresist spray coating process for deep trenched substrates. According to one implementation of the invention, the substrate surface is primed with a primer having a water contact angle between forty and fifty degrees. A spray nozzle is moved across the diameter of the substrate at varying speeds to achieve a coat of substantially the same thickness throughout. The photoresist is spray coated on the substrate surface at an angle to the substrate surface to obtain coverage of deep etched features. The photoresist is dissolved in a solvent according to specific dilution ratios to achieve a viscosity range that permits spraying the photoresist evenly in deep etch features while avoiding pull-back.
    Type: Application
    Filed: October 7, 2003
    Publication date: April 7, 2005
    Inventors: Howard Ge, Christine Geosling