Patents by Inventor Howard H. Tang

Howard H. Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10380937
    Abstract: The disclosure relates to systems and methods for reducing VCOM settling periods. A number of pixels is sub-divided into a plurality of regions. The pixels are configured to transmit light. A common voltage (VCOM) driving circuit is configured to drive a common electrode of the pixels. Moreover, each of a number of VCOM driving circuits includes a variable resistor configured to be driven to a resistance level based at least in part on which region of the plurality of regions includes an active pixel within the region. Furthermore, a resistance level is set and based at least in part on where the active pixel is located.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: August 13, 2019
    Assignee: Apple Inc.
    Inventors: Howard H. Tang, Paolo Sacchetto, Chaohao Wang, Szu-Hsien Lee, Patrick Bennett, Fenghua Zheng
  • Patent number: 10311822
    Abstract: Systems and methods are provided for improving displayed image quality of an electronic display with reduced power consumption. In some embodiments, a display pixel in the electronic display includes a pixel electrode and a common electrode. A pixel electrode driver electrically coupled to the first display pixel writes the display pixel by supplying a pixel voltage signal to the pixel electrode. A common electrode driver electrically coupled to the common electrode includes a power amplifier that supplies a common voltage signal to the common electrode to predictively offset net charge accumulation expected in the common electrode; a first power supply rail selectively connectable to the power amplifier based on a target voltage of the common voltage signal; and a second power supply rail selectively connectable to the power amplifier based on the target voltage, in which the first and second power supply rails supply different voltages when connected.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: June 4, 2019
    Assignee: APPLE INC.
    Inventors: Fenghua Zheng, Howard H. Tang, Sandro H. Pintz
  • Patent number: 10276085
    Abstract: This application relates to systems, methods, and apparatus for compensating voltage for pixels of a display panel based on the location of the pixels within the display panel. An amount of voltage compensation is assigned to each pixel or a group of pixels within the display panel in accordance with a calibration of the display panel. During operation of the display panel, pixel data is generated for a location of the display panel, and the pixel data is modified according to the amount of voltage compensation corresponding to the location. By modifying the pixel data in this way, spatial variations in voltage across the display panel can be mitigated in order to reduce the occurrence of certain display artifacts at the display panel.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: April 30, 2019
    Assignee: Apple Inc.
    Inventors: Chaohao Wang, Paolo Sacchetto, Marc Albrecht, Christopher P. Tann, Shih-Chyuan Fan Jiang, Howard H. Tang, James E. C. Brown, Zhibing Ge
  • Patent number: 10043472
    Abstract: A display device may include a source line that provides a data line signal to a pixel of the display device, a gate line that provides a gate signal to a switches associated with the pixel, and a voltage gate line disposed parallel to the source line and coupled to the gate line at a cross point node. The display device may also include a driver circuit that receives a pixel value to provide to the pixel, determines a compensation amount for the pixel value based on an expected kickback voltage present on the pixel due to a coupling effect between the source line and the voltage gate line, generates a compensated data line signal based on the compensation value and the pixel value, and provides the compensated data line signal to the pixel via the source line.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: August 7, 2018
    Assignee: Apple Inc.
    Inventors: Chaohao Wang, Paolo Sacchetto, Howard H. Tang
  • Patent number: 10008139
    Abstract: A display device may include a plurality of pixels, a plurality of source lines that may provide a plurality of data line signals to the plurality of pixels, a plurality of gate lines that may provide a plurality of gate signals to a plurality of switches associated with the plurality of pixels, and a plurality of voltage gate lines disposed parallel to the plurality of source lines and coupled to the plurality of gate lines at a plurality of cross point nodes. The plurality of cross point nodes are positioned in a pseudo random order across the display device.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: June 26, 2018
    Assignee: APPLE INC.
    Inventors: Howard H. Tang, Wei Chen, Paolo Sacchetto, Chaohao Wang, Chun-Yao Huang, Hao-Lin Chiu
  • Publication number: 20180082634
    Abstract: An apparatus receives current image frame data and data relating to at least one previous image frame for an electronic display. One or more parameters related to hysteresis of transistors in the electronic display are sensed. A correlation device, such as a look-up table, receives the sensed parameter or parameters and the data relating to one or more image frames, and uses this information, at least in part, to output an appropriate compensation signal for the current image frame data. The compensated current image frame data may then be supplied to the electronic display to reduce or eliminate the effects of hysteresis on the displayed image.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 22, 2018
    Inventors: Chaohao Wang, Chih-Wei Yeh, Chin-Wei Lin, Hung Sheng Lin, Hyunwoo Nho, Injae Hwang, Jie Won Ryu, Junhua Tan, Paolo Sacchetto, Rui Zhang, Shengkui Gao, Sun-Il Chang, Wei H. Yao, Howard H. Tang
  • Publication number: 20180068624
    Abstract: Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 8, 2018
    Inventors: Fenghua Zheng, Howard H. Tang, James C. Aamold, Sandro H. Pintz, Chaohao Wang, Paolo Sacchetto
  • Publication number: 20180061355
    Abstract: Systems and methods are provided for improving displayed image quality of an electronic display with reduced power consumption. In some embodiments, a display pixel in the electronic display includes a pixel electrode and a common electrode. A pixel electrode driver electrically coupled to the first display pixel writes the display pixel by supplying a pixel voltage signal to the pixel electrode. A common electrode driver electrically coupled to the common electrode includes a power amplifier that supplies a common voltage signal to the common electrode to predictively offset net charge accumulation expected in the common electrode; a first power supply rail selectively connectable to the power amplifier based on a target voltage of the common voltage signal; and a second power supply rail selectively connectable to the power amplifier based on the target voltage, in which the first and second power supply rails supply different voltages when connected.
    Type: Application
    Filed: August 2, 2017
    Publication date: March 1, 2018
    Inventors: Fenghua Zheng, Howard H. Tang, Sandro H. Pintz
  • Patent number: 9761188
    Abstract: Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: September 12, 2017
    Assignee: APPLE INC.
    Inventors: Fenghua Zheng, Howard H. Tang, James C. Aamold, Sandro H. Pintz, Chaohao Wang, Paolo Sacchetto
  • Publication number: 20170061837
    Abstract: A display device may include a plurality of pixels, a plurality of source lines that may provide a plurality of data line signals to the plurality of pixels, a plurality of gate lines that may provide a plurality of gate signals to a plurality of switches associated with the plurality of pixels, and a plurality of voltage gate lines disposed parallel to the plurality of source lines and coupled to the plurality of gate lines at a plurality of cross point nodes. The plurality of cross point nodes are positioned in a pseudo random order across the display device.
    Type: Application
    Filed: January 14, 2016
    Publication date: March 2, 2017
    Inventors: Howard H. Tang, Wei Chen, Paolo Sacchetto, Chaohao Wang, Chun-Yao Huang, Hao-Lin Chiu
  • Publication number: 20170061864
    Abstract: The disclosure relates to systems and methods for reducing VCOM settling periods. A number of pixels is sub-divided into a plurality of regions. The pixels are configured to transmit light. A common voltage (VCOM) driving circuit is configured to drive a common electrode of the pixels. Moreover, each of a number of VCOM driving circuits includes a variable resistor configured to be driven to a resistance level based at least in part on which region of the plurality of regions includes an active pixel within the region. Furthermore, a resistance level is set and based at least in part on where the active pixel is located.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 2, 2017
    Inventors: Howard H. Tang, Paolo Sacchetto, Chaohao Wang, Szu-Hsien Lee, Patrick Bennett, Fenghua Zheng
  • Publication number: 20170018219
    Abstract: This application relates to systems, methods, and apparatus for compensating voltage for pixels of a display panel based on the location of the pixels within the display panel. An amount of voltage compensation is assigned to each pixel or a group of pixels within the display panel in accordance with a calibration of the display panel. During operation of the display panel, pixel data is generated for a location of the display panel, and the pixel data is modified according to the amount of voltage compensation corresponding to the location. By modifying the pixel data in this way, spatial variations in voltage across the display panel can be mitigated in order to reduce the occurrence of certain display artifacts at the display panel.
    Type: Application
    Filed: December 17, 2015
    Publication date: January 19, 2017
    Inventors: Chaohao WANG, Paolo SACCHETTO, Marc ALBRECHT, Christopher P. TANN, Shih-Chyuan FAN JIANG, Howard H. TANG, James E. C. BROWN, Zhibing GE
  • Publication number: 20160260407
    Abstract: Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 8, 2016
    Inventors: Fenghua Zheng, Howard H. Tang, James C. Aamold, Sandro H. Pintz, Chaohao Wang, Paolo Sacchetto
  • Publication number: 20160111054
    Abstract: A display device may include a source line that provides a data line signal to a pixel of the display device, a gate line that provides a gate signal to a switches associated with the pixel, and a voltage gate line disposed parallel to the source line and coupled to the gate line at a cross point node. The display device may also include a driver circuit that receives a pixel value to provide to the pixel, determines a compensation amount for the pixel value based on an expected kickback voltage present on the pixel due to a coupling effect between the source line and the voltage gate line, generates a compensated data line signal based on the compensation value and the pixel value, and provides the compensated data line signal to the pixel via the source line.
    Type: Application
    Filed: December 21, 2015
    Publication date: April 21, 2016
    Inventors: Chaohao WANG, Paolo SACCHETTO, Howard H. TANG
  • Patent number: 6893541
    Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP). For very high aspect-ratio holes, a copper seed layer is deposited by chemical vapor deposition (CVD) over the SIP copper nucleation layer, and PVD or ECP completes the hole filling. The copper seed layer may be deposited by a combination of SIP and high-density plasma sputtering. For very narrow holes, the CVD copper layer may fill the hole.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: May 17, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Tony P. Chiang, Yu D. Cong, Peijun Ding, Jianming Fu, Howard H. Tang, Anish Tolia
  • Publication number: 20030124846
    Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP). For very high aspect-ratio holes, a copper seed layer is deposited by chemical vapor deposition (CVD) over the SIP copper nucleation layer, and PVD or ECP completes the hole filling. The copper seed layer may be deposited by a combination of SIP and high-density plasma sputtering. For very narrow holes, the CVD copper layer may fill the hole.
    Type: Application
    Filed: December 20, 2002
    Publication date: July 3, 2003
    Inventors: Tony P. Chiang, Yu D. Cong, Peijun Ding, Jianming Fu, Howard H. Tang, Anish Tolia
  • Patent number: 6582569
    Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP). For very high aspect-ratio holes, a copper seed layer is deposited by chemical vapor deposition (CVD) over the SIP copper nucleation layer, and PVD or ECP completes the hole filling. The copper seed layer may be deposited by a combination of SIP and high-density plasma sputtering. For very narrow holes, the CVD copper layer may fill the hole.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: June 24, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Tony P. Chiang, Yu D. Cong, Peijun Ding, Jianming Fu, Howard H. Tang, Anish Tolia
  • Patent number: 6413383
    Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, particularly the ignition sequence, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP). Preferably, the plasma is ignited in a cool process in which low power is applied to the target in the presence of a higher pressure of argon working gas. After ignition, the pressure is reduced, and target power is ramped up to a relatively high operational level to sputter deposit the film.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: July 2, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Tony P. Chiang, Yu D. Cong, Peijun Ding, Jianming Fu, Howard H. Tang, Anish Tolia
  • Patent number: 6398929
    Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The target power for a 200 mm wafer is preferably at least 10 kW; more preferably, at least 18 kW; and most preferably, at least 24 kW. Hole filling with SIP is improved by long-throw sputtering in which the target-to-substrate spacing is at least 50% of substrate diameter, more preferably at least 80%, most preferably at least 140%. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP).
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: June 4, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Tony P. Chiang, Yu D. Cong, Peijun Ding, Jianming Fu, Howard H. Tang, Anish Tolia