Abstract: A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.

Abstract: An Ethernet controller has a buffer memory for receiving data packets, a data flow control unit for controlling the data flow to Ethernet controller, a packet counter, packet counter control logic for incrementing and decrementing the packet counter, a first register for storing a watermark, and a comparator logic coupled to the packet counter and the register for sending control signals to the data flow control unit.

Abstract: An Ethernet controller semiconductor chip has a system control unit, a media access control layer coupled with the system control unit, a physical layer coupled with the media access control layer, wherein the physical layer comprises a receiving port and a transmitting port, a switch control unit for providing a control signal for auto media device interface switching, and a plurality of external pins, wherein four pins are coupled with the receiving and transmitting port of the physical layer and one pin is coupled with the switch control unit for providing external access to the control signal for auto media device interface switching.

Abstract: An Ethernet controller semiconductor chip has a system control unit, a media access control layer coupled with the system control unit, a physical layer coupled with the media access control layer, wherein the physical layer comprises a receiving port and a transmitting port, a switch control unit for providing a control signal for auto media device interface switching, and a plurality of external pins, wherein four pins are coupled with the receiving and transmitting port of the physical layer and one pin is coupled with the switch control unit for providing external access to the control signal for auto media device interface switching.

Abstract: A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.

Abstract: An Ethernet controller has a buffer memory for receiving data packets, a data flow control unit for controlling the data flow to Ethernet controller, a packet counter, packet counter control logic for incrementing and decrementing the packet counter, a first register for storing a watermark, and a comparator logic coupled to the packet counter and the register for sending control signals to the data flow control unit.