Abstract: An integrated circuit includes a power amplifier and a power detector. The power detector has a VDET node and a VREF node. A first filter coupled to the VDET node outputs a signal VDET onto a VDET terminal. A second filter coupled the VREF node outputs a signal VREF onto a VREF terminal. The signals VDET and VREF are generated so that the voltage difference between the two signals varies in proportion to the RF output power magnitude with an accuracy of ±0.1 decibels over a ?45° C. to +85° C. temperature range. An amount of the RF signal as output by the power amplifier is coupled onto the VDET node and is detected by a half-wave rectifying RF detector diode. The diode has a capacitance that increases with temperature, so a temperature compensation circuit that has an admittance that decreases with temperature is coupled in parallel with the detector diode.

Abstract: A high frequency RF power transistor includes first and second elongated mesas. In one example, the transistor is part of a millimeter wave MMIC power amplifier. From the top-down perspective, the two mesas are disposed in an off-axis and staggered orientation with respect to one another. A branched gate electrode is formed such that a first branch from a gate signal input location to the first mesa is the same length as a second branch from the input location to the second mesa. Likewise, a branched drain electrode is formed such that a first branch from the first mesa to a drain signal output location is the same length as a second branch from the second mesa to the output location. The off-axis and staggered orientation of the mesas spreads heat generation across the integrated circuit and reduces circuit size in the critical dimension perpendicular to signal flow direction.

Abstract: Radio frequency monolithic power amplifier layout techniques for the purpose of the invention is for improved thermal and electrical performance of RF monolithic power amplifiers. The inventive device includes the main components of the invention is to exploit layout techniques to improve the thermal and electrical performances. A technique, named input feeding phase equalizer, is invented to achieve better heat dissipating performance. A second technique, named grounding equalizer, is invented to achieve better electrical performance. A third technique, named staggered transistor column, is invented to achieve better heat dissipation performance. The electrical length between the input to the input stage of a 2n-column cells is topologically altered to achieve input feeding phase equalization. The electrical length between the ground to the ground stage of a 2n-column cells is topologically altered to achieve distance equalization.

Abstract: Radio frequency monolithic power amplifier layout techniques for the purpose of the invention is for improved thermal and electrical performance of RF monolithic power amplifiers. The inventive device includes the main components of the invention is to exploit layout techniques to improve the thermal and electrical performances. A technique, named input feeding phase equalizer, is invented to achieve better heat dissipating performance. A second technique, named grounding equalizer, is invented to achieve better electrical performance. A third technique, named staggered transistor column, is invented to achieve better heat dissipation performance. The electrical length between the input to the input stage of a 2n-column cells is topologically altered to achieve input feeding phase equalization. The electrical length between the ground to the ground stage of a 2n-column cells is topologically altered to achieve distance equalization.