Patents by Inventor Howard L. Evans

Howard L. Evans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6130172
    Abstract: A EEPROM 140 has a storage transistor 160 with a gate insulating layer 104 of BPSG and a polysilicon gate 112.2 of the same layer as the polysilicon gate 112.1 of the FET transistor 150. The BPSG layer 104 has POHC traps that capture holes injected into N well 103.2. A positive voltage applied to N well 103.2 programs the storage transistor 160 off. Applying a positive voltage to the gate 112.2 neutralizes the holes stored in layer 104 and erases the memory of transistor 160.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: October 10, 2000
    Assignee: Intersil Corporation
    Inventors: Robert T. Fuller, Howard L. Evans, Michael J. Morrison, David A. DeCrosta, Robert K. Lowry
  • Patent number: 5808353
    Abstract: A EEPROM 140 has a storage transistor 160 with a gate insulating layer 104 of BPSG and a polysilicon gate 112.2 of the same layer as the polysilicon gate 112.1 of the FET transistor 150. The BPSG layer 104 has POHC traps that capture holes injected into N well 103.2. A positive voltage applied to N well 103.2 programs the storage transistor 160 off. Applying a positive voltage to the gate 112.2 neutralizes the holes stored in layer 104 and erases the memory of transistor 160.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: September 15, 1998
    Assignee: Harris Corporation
    Inventors: Robert T. Fuller, Howard L. Evans, Michael J. Morrison, David A. DeCrosta, Robert K. Lowry