Patents by Inventor Howard Mahaney
Howard Mahaney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7508676Abstract: A method of cooling a module attached to a board by a spring mechanism that provides access to the module during testing. A cold plate assembly features a dry thermal interface coupled with spring loaded plunger to ensure a module, such as a dual chip module (DCM), for example, remains in place during individual cold plate removal.Type: GrantFiled: April 11, 2008Date of Patent: March 24, 2009Assignee: International Business Machines CorporationInventors: Paul Samaniego, Levi Campbell, Michael Ellsworth, Jr., Michael Domitrovits, Paul Kelley, Howard Mahaney, Jr.
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Publication number: 20080062640Abstract: An optical transceiver includes structures that define an electrical connector port for allowing connection of an electrical connector to an optical subassembly of the transceiver, and structures that define a vent surrounding at least portions of the connector port, whereby the vent allows bidirectional passage of air therethrough. Included in the transceiver are structures that define electromagnetic interference shielding and selectively transfer heat of heat generating electronic components by conduction to a transceiver housing. Methods of cooling the transceiver by ventilation and internal heat conduction are present.Type: ApplicationFiled: October 31, 2007Publication date: March 13, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William Anderl, Scott Branch, David Gaio, Michael Hanley, William Hogan, Howard Mahaney
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Publication number: 20070210819Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 13, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205756Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205757Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205773Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205786Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205796Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205797Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20070205758Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: May 10, 2007Publication date: September 6, 2007Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20060152238Abstract: A system, apparatus and method for controlling temperature of an integrated circuit in a chip tester is disclosed. Embodiments include supplying a chilled fluid to a cold plate at a first flowrate, where the first flowrate is associated with a first valve setting based on at least a desired temperature setpoint and an applied power. Embodiments may determine a change in applied power and modify the chilled fluid flowrate in response to a change in testing conditions to a second flowrate associated with a second valve setting associated with at least the desired temperature setpoint and the changed testing conditions. This feed forward loop may be supplemented by a feedback loop that includes modifying the energy supplied to a cold plate heater in response to a comparison of a current temperature and the temperature setpoint. The valve may be a proportional control valve or the like.Type: ApplicationFiled: January 12, 2005Publication date: July 13, 2006Inventors: Daniel Beaman, Robert Florence, Howard Mahaney, Frederic Wright
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Publication number: 20060152237Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.Type: ApplicationFiled: January 12, 2005Publication date: July 13, 2006Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
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Publication number: 20060098924Abstract: An optical transceiver includes structures that define an electrical connector port for allowing connection of an electrical connector to an optical subassembly of the transceiver, and structures that define a vent surrounding at least portions of the connector port, whereby the vent allows bidirectional passage of air therethrough. Included in the transceiver are structures that define electromagnetic interference shielding and selectively transfer heat of heat generating electronic components by conduction to a transceiver housing. Methods of cooling the transceiver by ventilation and internal heat conduction are present.Type: ApplicationFiled: December 15, 2005Publication date: May 11, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William Anderl, Scott Branch, David Gaio, Michael Hanley, William Hogan, Howard Mahaney
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Publication number: 20050040838Abstract: A chip testing system with improved thermal performance. In a preferred embodiment, a nest assembly of a chip testing apparatus includes tooling balls and a fitted frame for improving alignment of a coldplate and a chip surface. In preferred embodiments, the coldplate is of unibody design. Thermal performance is also improved by balancing the forces exerted on the coldplate using an adjustable hose mounting bracket. The bracket allows the forces exerted by the hoses on the coldplate to be adjusted so they balance and cancel other unwanted forces on the cold plate.Type: ApplicationFiled: August 21, 2003Publication date: February 24, 2005Applicant: International Business Machines CorporationInventors: Lonnie Cannon, John Corbin, David Gardell, Jose Garza, Jeffrey Kutner, Kenneth Larsen, Howard Mahaney, John Salazar
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Publication number: 20050030053Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.Type: ApplicationFiled: August 20, 2004Publication date: February 10, 2005Inventors: Daniel Beaman, John Corbin, Dales Kent, Howard Mahaney, Hoa Phan, Frederic Wright
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Publication number: 20050030052Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.Type: ApplicationFiled: August 6, 2003Publication date: February 10, 2005Applicant: International Business Machines CorporationInventors: Daniel Beaman, John Corbin, Dales Kent, Howard Mahaney, Hoa Phan, Frederic Wright