Abstract: This specification describes a charge-transfer device transversal filter chip in which an input signal is fed in parallel into a number of channels the outputs of which are summed together to provide the desired transversal filter transfer function. Each channel contains an analog shift register, a signal splitter and a polarity selector. The shift registers are of unequal length to provide a different delay thru each channel. The signal splitter provides a plurality of signal paths thru each channel while the polarity selector determines whether a given path in a given channel is added or subtracted in the summation to determine the gain of the given channel in the summation.

Abstract: A charge transfer device capacitive ratio voltage multiplication circuit has been devised which solves the problem of cumulative DC bias offset by adding a DC signal compensation branch to prevent the accumulation of DC offset potential. The circuit can be expanded to form a weighted sum of multiple inputs which does not incur any corresponding DC bias offset, by making the sum of the characteristic capacitances of each of the multiple inputs equal to the characteristic capacitance of the output portion of the charge transfer device circuit. The circuit allows arithmetic operations to be performed on input signals solely in the charge domain without the necessity of converting charge to voltage to charge, thereby avoiding losses, distortions, offsets and a reduction in dynamic range which would otherwise result.

Abstract: The underlying concept of the invention disclosed is the use of charge partitioning for providing a precision weighted tap in a bucket brigade circuit. At the drain node of a charge conducting element in a bucket brigade device, the signal path is split in half with a first half going to the source of a first FET and the second half going to the source of a second FET. The first and second FET devices have their associated overlap capacitances, transconductances and threshold voltages matched by virtue of their close proximity to one another on the semiconductor substrate so as to have matched charge transfer characteristics. The amplitude of the charge stored on the capacitor at the node is therefore divided into two parts, with one portion being transferred by the first FET device and the remaining portion being transferred by the second FET device. This simple circuit accomplishes a precise charge division for the charge entered into the bucket brigade circuit.