Patents by Inventor Howard Pritchard

Howard Pritchard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161419
    Abstract: A method includes using at least one processor to receive image data including one or more virtual objects and determining a distance between a user extremity and the one or more virtual objects based on the image data. Further, the method includes detecting a first gesture of the user extremity based on the image data and generating a virtual sphere within a virtual object of the one or more virtual objects. The method also includes determining that the distance is less than a threshold, detecting movement of the user extremity based on the image data, and adjusting a position of the virtual object based on the movement of the user extremity.
    Type: Application
    Filed: March 29, 2023
    Publication date: May 16, 2024
    Inventors: Rafi Izhar, Simon Blackwell, Pascal Gilbraith, John Howard Pritchard
  • Patent number: 10860524
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott
  • Patent number: 10129329
    Abstract: An improved method for the prevention of deadlock in a massively parallel processor (MPP) system wherein, prior to a process sending messages to another process running on a remote processor, the process allocates space in a deadlock-avoidance FIFO. The allocated space provides a “landing zone” for requests that the software process (the application software) will subsequently issue using a remote-memory-access function. In some embodiments, the deadlock-avoidance (DLA) function provides two different deadlock-avoidance schemes: controlled discard and persistent reservation. In some embodiments, the software process determines which scheme will be used at the time the space is allocated.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: November 13, 2018
    Assignee: Cray Inc.
    Inventors: Edwin L. Froese, Eric P. Lundberg, Igor Gorodetsky, Howard Pritchard, Charles Giefer, Robert L. Alverson, Duncan Roweth
  • Publication number: 20160077997
    Abstract: An improved method for the prevention of deadlock in a massively parallel processor (MPP) system wherein, prior to a process sending messages to another process running on a remote processor, the process allocates space in a deadlock-avoidance FIFO. The allocated space provides a “landing zone” for requests that the software process (the application software) will subsequently issue using a remote-memory-access function. In some embodiments, the deadlock-avoidance (DLA) function provides two different deadlock-avoidance schemes: controlled discard and persistent reservation. In some embodiments, the software process determines which scheme will be used at the time the space is allocated.
    Type: Application
    Filed: October 13, 2015
    Publication date: March 17, 2016
    Inventors: Edwin L. Froese, Eric P. Lundberg, Igor Gorodetsky, Howard Pritchard, Charles Giefer, Robert L. Alverson, Duncan Roweth
  • Publication number: 20150378961
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 31, 2015
    Applicant: Intel Corporation
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott
  • Patent number: 9160607
    Abstract: An improved method for the prevention of deadlock in a massively parallel processor (MPP) system wherein, prior to a process sending messages to another process running on a remote processor, the process allocates space in a deadlock-avoidance FIFO. The allocated space provides a “landing zone” for requests that the software process (the application software) will subsequently issue using a remote-memory-access function. In some embodiments, the deadlock-avoidance (DLA) function provides two different deadlock-avoidance schemes: controlled discard and persistent reservation. In some embodiments, the software process determines which scheme will be used at the time the space is allocated.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: October 13, 2015
    Assignee: Cray Inc.
    Inventors: Edwin L. Froese, Eric P. Lundberg, Igor Gorodetsky, Howard Pritchard, Charles Giefer, Robert L. Alverson, Duncan Roweth
  • Patent number: 9069672
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: June 30, 2015
    Assignee: Intel Corporation
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott
  • Publication number: 20100318626
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 16, 2010
    Applicant: Cray Inc.
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott