Patents by Inventor Howard Rhodes

Howard Rhodes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9165969
    Abstract: An apparatus of one aspect includes a photodetector array, and a peripheral region at a periphery of the photodetector array. A thinner interconnect line corresponding to the photodetector array is disposed within one or more insulating layers. A thicker interconnect line corresponding to the peripheral region is disposed within the one or more insulating layers. Other apparatus, methods, and systems are also disclosed.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: October 20, 2015
    Assignee: OmniVision Technologies, Inc.
    Inventors: Duli Mao, Vincent Venezia, Howard Rhodes, Hsin Chih Tai, Yin Qian
  • Publication number: 20140231622
    Abstract: Techniques and mechanisms for a pixel array to provide a level of conversion gain. In an embodiment, the pixel array includes conversion gain control circuitry to be selectively configured at different times for different operational modes, each mode for implementing a respective conversion gain. The conversion gain control circuitry selectively provides switched coupling of the pixel cell to—and/or switched decoupling of the pixel cell from—a supply voltage. In another embodiment, the conversion gain control circuitry selectively provides switched coupling of the pixel cell to—and/or switched decoupling of the pixel cell from—sample and hold circuitry.
    Type: Application
    Filed: February 21, 2013
    Publication date: August 21, 2014
    Inventors: Duli Mao, Vincent Venezia, Gang Chen, Hsin-Chih Tai, Howard Rhodes
  • Patent number: 8642374
    Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, a method includes forming a first and second gate oxide layer over a substrate, forming a layer of photoresist over the first gate oxide layer, applying nitridation to the photoresist and the second gate oxide layer such that the first gate oxide layer is protected from the nitridation by the photoresist, and forming a polysilicon gate over the first and second gate oxide layers.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: February 4, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Jeong-Ho Lyu, Sohei Manabe, Howard Rhodes
  • Publication number: 20130256822
    Abstract: Techniques for providing a pixel cell which exhibits improved doping in a semiconductor substrate. In an embodiment, a first doping is performed through a backside of the semiconductor substrate. After the first doping, the semiconductor substrate is thinned to expose a front side which is opposite of the backside. In another embodiment, a second doping is performed through the exposed front side of the thinned semiconductor substrate to form at least part of a pixel cell structure.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 3, 2013
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai, Howard Rhodes
  • Publication number: 20130056800
    Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, a method includes forming a first and second gate oxide layer over a substrate, forming a layer of photoresist over the first gate oxide layer, applying nitridation to the photoresist and the second gate oxide layer such that the first gate oxide layer is protected from the nitridation by the photoresist, and forming a polysilicon gate over the first and second gate oxide layers.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 7, 2013
    Inventors: Jeong-Ho Lyu, Sohei Manabe, Howard Rhodes
  • Publication number: 20130056809
    Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, an imaging pixel of an image sensor includes a photodiode region to accumulate an image charge in response to incident light, a first transistor having a gate oxide layer, the gate oxide layer having a first level of nitridation, and a second transistor having a gate oxide layer, the gate oxide layer having a second level of nitridation that is higher than the first level of nitridation.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 7, 2013
    Inventors: Duli Mao, Hsin Chih Tai, Vincent Venezia, Howard Rhodes
  • Publication number: 20120319242
    Abstract: Forming a doped isolation region in a substrate during manufacture of an image sensor. A method of an aspect includes forming a hardmask layer over the substrate, and forming a photoresist layer over the hardmask layer. An opening is formed in the photoresist layer over an intended location of the doped isolation region. An opening is etched in the hardmask layer by exposing the hardmask layer to one or more etchants through the opening. The opening in the hardmask layer may have a width of less than 0.4 micrometers. The doped isolation region may be formed in the substrate beneath the opening in the hardmask layer by performing a dopant implantation that introduces dopant through the opening in the hardmask layer. The method of an aspect may include forming sidewall spacers on sidewalls of the opening in the hardmask layer and using the sidewall spacers as a dopant implantation mask.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Keh-Chiang Ku, Yin Qian, Gang Chen, Rongsheng Yang, Howard Rhodes
  • Publication number: 20120261730
    Abstract: An image sensor including a pixel array having a floating diffusion region of a pixel which is disposed in a substrate, the floating diffusion region to receive a charge from a photosensitive region. In an embodiment, a transfer gate disposed on the substrate, wherein a portion of the transfer gate forms a cavity extending through the transfer gate. In another embodiment, a cavity extending through a transfer gate exposes a floating diffusion region.
    Type: Application
    Filed: April 15, 2011
    Publication date: October 18, 2012
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Gang Chen, Hsin-Chih Tai, Duli Mao, Howard Rhodes
  • Patent number: 8202806
    Abstract: A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separated by the nonconducting region. A barrier layer and a dielectric layer are deposited over the nonconducting region and over the active regions. Heat is applied to the integrated circuit causing the barrier layer to anneal.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: June 19, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P.S. Thakur, Ravi Iyer, Howard Rhodes
  • Publication number: 20110227184
    Abstract: An apparatus of one aspect includes a photodetector array, and a peripheral region at a periphery of the photodetector array. A thinner interconnect line corresponding to the photodetector array is disposed within one or more insulating layers. A thicker interconnect line corresponding to the peripheral region is disposed within the one or more insulating layers. Other apparatus, methods, and systems are also disclosed.
    Type: Application
    Filed: March 18, 2010
    Publication date: September 22, 2011
    Inventors: Duli Mao, Vincent Venezia, Howard Rhodes, Hsin Chih Tai, Yin Qian
  • Patent number: 7919797
    Abstract: A trench isolation having a sidewall and bottom implanted region located within a substrate of a first conductivity type is disclosed. The sidewall and bottom implanted region is formed by an angled implant, a 90 degree implant, or a combination of an angled implant and a 90 degree implant, of dopants of the first conductivity type. The sidewall and bottom implanted region located adjacent the trench isolation reduces surface leakage and dark current.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: April 5, 2011
    Assignee: Aptina Imaging Corporation
    Inventors: Howard Rhodes, Chandra Mouli
  • Patent number: 7811850
    Abstract: Isolation methods and devices for isolating pixels of an image sensor pixel. The isolation structure and methods include forming a biased gate over a field isolation region and adjacent a pixel of an image sensor. The isolation methods also include forming an isolation gate over substantial portions of a field isolation region to isolate pixels in an array of pixels.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: October 12, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: Chandra Mouli, Howard Rhodes
  • Patent number: 7750382
    Abstract: A deep implanted region of a first conductivity type located below a transistor array of a pixel sensor cell and adjacent a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The deep implanted region reduces surface leakage and dark current and increases the capacitance of the photodiode by acting as a reflective barrier to photo-generated charge in the doped region of the second conductivity type of the photodiode. The deep implanted region also provides improved charge transfer from the charge collection region of the photodiode to a floating diffusion region adjacent the gate of the transfer transistor.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: July 6, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Howard Rhodes
  • Patent number: 7745858
    Abstract: A pinned photodiode with a pinned surface layer formed by a self-aligned angled implant is disclosed. The angle of the implant may be tailored to provide an adequate offset between the pinned surface layer and an electrically active area of a transfer gate of the pixel sensor cell. The pinned surface layer is formed by employing the same mask level as the one employed for the formation of the photodiode region, and then implanting dopants at angles other than zero degrees.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: June 29, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: Chandra Mouli, Howard Rhodes
  • Patent number: 7732247
    Abstract: Isolation methods and devices for isolating regions of a semiconductor device. The isolation method and structure include forming an isolating trench in an active area and filling the trench with a doped conductive material containing silicon. Suitable conductive materials containing silicon include polysilicon and silicon-germanium. There is also provided a method and structure for isolating the regions by providing a trench in an active area of a substrate, growing an epitaxial layer in the trench to fill the trench or to partially fill the trench and depositing an insulating material over the epitaxial layer and within the trench to completely fill the trench.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: June 8, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard Rhodes
  • Patent number: 7589306
    Abstract: An image sensor includes an optical sensor region, a stack of dielectric and metal layers, and a buried focusing layer. The optical sensor is disposed within a semiconductor substrate. The stack of dielectric and metal layers are disposed on the semiconductor substrate above the optical sensor region. The metal layers include optical pass-throughs aligned to expose an optical path through the stack form a top dielectric layer through to the optical sensor region. The buried focusing layer is disposed over a conforming metal layer of the metal layers within the stack. The buried focusing layer includes a curved surface conformed by the optical pass-through of the conforming metal layer to focus light onto the optical sensor region.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: September 15, 2009
    Assignee: OmniVision Technologies, Inc.
    Inventors: Vincent Venezia, Hsin-Chih Tai, Duli Mao, Wei Dong Qian, Ashish Shah, Howard Rhodes
  • Publication number: 20090200452
    Abstract: An image sensor includes an optical sensor region, a stack of dielectric and metal layers, and a buried focusing layer. The optical sensor is disposed within a semiconductor substrate. The stack of dielectric and metal layers are disposed on the semiconductor substrate above the optical sensor region. The metal layers include optical pass-throughs aligned to expose an optical path through the stack form a top dielectric layer through to the optical sensor region. The buried focusing layer is disposed over a conforming metal layer of the metal layers within the stack. The buried focusing layer includes a curved surface conformed by the optical pass-through of the conforming metal layer to focus light onto the optical sensor region.
    Type: Application
    Filed: February 12, 2008
    Publication date: August 13, 2009
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Vincent Venezia, Hsin-Chih Tai, Duli Mao, Wei Dong Qian, Ashish Shah, Howard Rhodes
  • Publication number: 20090179296
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Application
    Filed: January 7, 2009
    Publication date: July 16, 2009
    Inventors: Howard Rhodes, Jeff McKee
  • Patent number: 7531379
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: May 12, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff Mckee
  • Patent number: 7525134
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: April 28, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff McKee