Abstract: Signal processing apparatus is disclosed comprising a plurality of charge storage cells, each including first and second storage regions in a semiconductor substrate. Means are provided responsive to a scanning signal for introducing into each of the cells a respective quantity of charge, a first portion of which is contained in one of the storage regions and represents a respective analog signal sample. Means are provided for transferring each first portion of charge from one storage region to the other storage region in a respective cell in response to a respective second signal. Means are provided connected in circuit with the first electrodes for sensing the charge transferred to and from the first charge storage regions of the cells for detecting the signal samples.

Abstract: In signal detection apparatus for sensing large excursion of a time varying signal from its average value, charge transfer circuits are utilized to provide a threshold level for detection which adapts to the changing average value of the background component of the time varying signal.

Abstract: An analog multiplier for multiplying each sample of an input sequence of samples of an analog signal by a respective multiplying coefficient of a series of coefficients is provided. The multiplier includes a plurality of charge storage cells, each cell including a first and a second storage region. Means are provided for introducing into each of the charge storage cells a respective quantity of charge representing a respective sample of a signal. The quantity of charge is divided between the first and second storage regions of a cell in proportion to the ratio of the width of the first storage region to width of the second storage region thereof. Means are provided for altering the charge in each of the second storage regions of each of the cells.

Abstract: A plurality of charge storage cells, each including first and second storage regions, are provided in a semiconductor substrate. Means are provided responsive to a scanning signal for introducing into each of the cells a respective quantity of charge proportional to a respective sample of an analog signal. Each quantity of charge includes first and second portions of equal value. Each first portion is solely contained in the first storage region of a respective cell and each second portion is contained in the second storage region of a respective cell. Means are provided responsive to the bits of one value of a digital reference word for transferring the first portions of said quantities of charge into the second storage regions in the cells associated with such bits of one value.

Abstract: The output circuit includes a high gain differential amplifier having an inverting input terminal, a non-inverting input terminal and an output terminal with a feedback capacitance connected between the output terminal and the inverting input terminal. The input terminals are connected to first and second commonly phased lines of the charge transfer transversal filter. A first switchable impedance means is connected between the first line and the output terminal. A second switchable impedance means is connected between the second line and a d-c source of voltage. The lines are charged periodically to the voltage of the source by the first and second switchable impedance means prior to the transfer of charge in a cycle of operation of the filter and are then isolated from the source during the transfer of charge in the filter by the first and second switchable impedance means.