Patents by Inventor Howard Thomas
Howard Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030166372Abstract: The needlepunched nonwoven synthetic material prevents the insects from burrowing through by presenting the insects with overlapping, randomly placed fiber layers. The insects attack the ends of the fibers, going from fiber to fiber until they are trapped within the fabric layers. Water permeability is enabled while preventing insects from penetrating the material.Type: ApplicationFiled: February 3, 2003Publication date: September 4, 2003Inventor: Howard Thomas
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Publication number: 20030136495Abstract: A new machine control method and system for registering pre-produced webs into a converting line producing disposable absorbent articles such as diapers, pull-ups, feminine hygiene articles or a component thereof. The pre-produced webs can include a multiplicity of pre-produced objects spaced on the web at a pitch interval in the web direction. The pre-produced web being manipulated in order for the pre-produced object of the web to be registered in relation to a target position constant. The present invention includes three embodiments, where the first embodiment is expressed as a generic claim. The first embodiment includes a closed-loop feedback registration system; the second and third embodiments, in addition, include an open-loop feedforward phasing system. In addition, the third embodiment uses a machine vision system to recognize any element of a complex pre-produced object (e.g., colorful graphics).Type: ApplicationFiled: December 20, 2002Publication date: July 24, 2003Applicant: The Procter & Gamble CompanyInventors: Charles Phillip Miller, Michael S. Kolodesh, Douglass Scott Henry, Michael Joseph Lamping, Jon Kevin McLaughlin, Terry Howard Thomas
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Publication number: 20030066830Abstract: An apparatus and method for generating heat, in particular for heating a fluid. The apparatus includes a frame, with at least one permanent magnet fixedly mounted to the frame. An electrically conductive member is disposed proximate the permanent magnets. The magnetic field of the magnets upon the conductive member is made to vary cyclically. Typically either the permanent magnets, the conductive member, or both are movable with respect to one another. Relative motion of the conductive member and the magnets causes the magnetic field experienced by the conductive member to vary, which causes it to become hot. The total heat energy generated in the conductive member may exceed the total energy applied to the apparatus to produce the varying magnetic field. The apparatus may include a fluid path proximate the conductive member. Fluid in the fluid path receives heat from the conductive member.Type: ApplicationFiled: October 11, 2002Publication date: April 10, 2003Applicant: MagTec LLCInventors: TRoy Reed, Tim Lunneborg, Kevin Loll, Paul Gene Dimmer, James Ronald Thomas, Neil Howard Thomas
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Publication number: 20030008584Abstract: A material to reduce the effects of trauma received from the impact of a projectile. One embodiment is a needle-punched, non-woven material including at least one type of ballistic fibers selected and oriented to provide a cushioning effect and maintain a high compressive restitution constant. A percentage of the fibers are oriented with at least their ends lying approximately perpendicular to the fabric plane and/or oriented to lie in a waveform generally along or parallel to the fabric plane. This enables the ends of the fibers lying perpendicular to the fabric plane to cushion the impact from the projectile by dissipating energy through compressional resistance, and the fibers along the fabric plane to reduce energy through dispersal along fiber lines, thereby reducing the trauma resulting from an impact.Type: ApplicationFiled: January 23, 2002Publication date: January 9, 2003Inventor: Howard Thomas
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Patent number: 6464831Abstract: A paper web and method of making the paper web are disclosed. The paper web has a background portion and a non-embossed decorative pattern. The decorative pattern has at least one high basis weight region having a basis weight greater than the average basis weight of the surrounding background portion. The decorative pattern can include a number of discrete, decorative indicia. Each decorative indicia can be separated from adjacent decorative indicia by the background portion.Type: GrantFiled: March 17, 2000Date of Patent: October 15, 2002Assignee: The Procter & Gamble CompanyInventors: Paul Dennis Trokhan, Dean Van Phan, Howard Thomas Deason, Jörg Kleinwächter
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Publication number: 20020103010Abstract: A telecommunications network system (10), formed of multiple interconnected nodes (16-22, 26-34, 50-58), is shown in FIG. 1. At least some of the nodes are provided with application spaces (DPASs, 70-94) into which specific programs can be downloaded and run. The application space (DPASs, 70-94), realized by control logic and memory, takes control of managing specific programs and reporting results arising from execution of the specific programs. The application spaces support specific functionality dependent upon the functionality of the node, and support real-time downloading and running of code. Resultant data acquired from running the specific programs is correlated between nodes to produce highly pertinent management data that is communicated to a management device, such as an OMC (48), for analysis and fault identification/performance optimization.Type: ApplicationFiled: October 1, 2001Publication date: August 1, 2002Inventors: Howard Thomas, David Fraser Chambers, Ian Bartlett, Paul Crichton
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Patent number: 6408341Abstract: A communications apparatus is provided comprising a plurality of FIFO buffers, each with independent control and priority logic under software control for supporting different types of message traffic, both send and receive, such as comprise a multimedia server system. Processor software directs messages to specific, optimized FIFO buffers. Further, a system is provided including a plurality of nodes wherein a sending node specifies the communications path through the system, selecting specific FIFO buffers in each node for buffering its messages.Type: GrantFiled: February 2, 2000Date of Patent: June 18, 2002Assignee: International Business Machines CorporationInventors: James William Feeney, Howard Thomas Olnowich, George William Wilhelm, Jr.
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Patent number: 6389476Abstract: A network adapter capable of adapting its transmission speed to that of another adapter of the same or slower speed so as to mix adapters of different speeds in the same communication network. In send mode, the adapter selects one of a plurality of transmission speeds based on the message header including a field specifying the message speed, which speed is known to be supported by the adapter at the addressed receive node. The sending adapter prefixes the message with a synchronization byte which defines transmission speed selected and transmits the message at the selected speed. In receive mode, the adapter decodes within one clock cycle the message speed from the message synchronization byte, and responsive thereto generates the clock for gating the receive message into adapter memory.Type: GrantFiled: July 6, 1999Date of Patent: May 14, 2002Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich
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Patent number: 6343346Abstract: A shared memory parallel processing system interconnected by a multi-stage network combines new system configuration techniques with special-purpose hardware to provide remote memory accesses across the network, while controlling cache coherency efficiently across the network. The system configuration techniques include a systematic method for partitioning and controlling the memory in relation to local verses remote accesses and changeable verses unchangeable data. Most of the special-purpose hardware is implemented in the memory controller and network adapter, which implements three send FIFOs and three receive FIFOs at each node to segregate and handle efficiently invalidate functions, remote stores, and remote accesses requiring cache coherency. The segregation of these three functions into different send and receive FIFOs greatly facilitates the cache coherency function over the network. In addition, the network itself is tailored to provide the best efficiency for remote accesses.Type: GrantFiled: March 1, 2000Date of Patent: January 29, 2002Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich
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Patent number: 6263374Abstract: An apparatus that converts and adapts standard processor bus protocol and architecture, such as the MicroChannel bus, to more progressive switch interconnection protocol and architecture. Existing bus-based architecture is extended to perform parallel and clustering functions by enabling the interconnection of thousands of processors. The apparatus is relatively easy to implement and inexpensive to build. The communication media is switch-based and is fully parallel, supporting nodes interconnected by the switching network.Type: GrantFiled: August 4, 1994Date of Patent: July 17, 2001Assignee: International Business Machines CorporationInventors: Howard Thomas Olnowich, Michael Wayland Dotson, James William Feeney, Michael Hans Fisher, John David Jabusch, Robert Francis Lusch, Michael Anthony Maniguet
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Patent number: 6243378Abstract: Contention losses are minimized in path searching, circuit-switched networks by adding intelligence to the last stage of the network. A count of number of bytes remaining to be transferred in each active message is maintained in real time for each output port of the network. If contention arises at the last stage switch being requested in camp-on mode to make a connection to a busy output port, the switch checks the bytes remaining count and responds differently depending on how the bytes remaining count compares to a preset threshold register. If the count remaining is below the threshold, the last stage switch accepts the camp-on request, because the desired output port will be available shortly. If the count remaining is above the threshold or below the threshold but another user is camped-on, the switch rejects the camp-on request to the last stage, because the desired output port will not be available shortly. In this case further path searching would be meaningless.Type: GrantFiled: October 27, 1999Date of Patent: June 5, 2001Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich
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Patent number: 6226683Abstract: Disclosed is is a switch-based network interconnection which uses intelligent switching apparatus devices for improving the performance and connection establishing capability of multi-stage switching networks. The invention method is particularly effective In asynchronous circuit-switched networks. The most important feature of the invention methodology is the an increasing probability for the success of making a connection through all the stages of a multi-satge network. As a connection progresses through a multi-stage network, it must win successive stages of the network, one at a time, until it has made its way from on side of the network to the other and established the commanded source-to-destination connection. The uniqueness in the present invention is that as the connection at each stage of the network is established, looking forward to the next stage, the probability will be greater of establishing the next connection without encountering blocking than it was for the present stage.Type: GrantFiled: April 1, 1996Date of Patent: May 1, 2001Assignee: International Business Machines CorporationInventors: Howard Thomas Olnowich, Jehoshua Bruck, James William Feeney, Eli Upfal
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Patent number: 6215412Abstract: A new asynchronous approach used to quickly and dynamically switch input port connections to output port connections and to resolve contention. The switch is self-routing in two cycle times at the same high speed serial rate that data is transferred through the switch. The normal mode of the switch requires absolutely no synchronization amongst any of the input and output ports which interface to the switch. The switch is void of centrally controlled clocking and any data buffering. Data traverses the switch only encountering three gate delays—on-chip receiver, mux, and off-chip driver. Contention is detected and resolved on chip, and yet the logic implementation is extremely simple and low in gate count, so the switch design is never gate limited. The protocol requires several parallel data lines plus two or three control lines.Type: GrantFiled: June 2, 1995Date of Patent: April 10, 2001Assignee: International Business Machines CorporationInventors: Peter Anthony Franaszek, Christos John Georgiou, Robert Francis Lusch, Joseph Michael Mosley, Howard Thomas Olnowich
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Patent number: 6212385Abstract: A cellular communication system has a frequency bandwidth arranged into a plurality of frequency channels, and a plurality of neighbouring first (130) and second (132) sites each having sectors (a1-f1, a2-f2) containing at least one frequency channel. Corresponding sectors in each of the neighbouring first (130) and second sites (132) have consecutive frequency channels from the frequency bandwidth, thereby producing a two-site re-use pattern (134, 136). The cellular communication system may be adapted to support an underlay/overlay cell configuration in which neighbouring first (230) and second (232) sites each have six-sectors containing at least one frequency channel (b1-b12) of a two-site repeat pattern. The six sectors further each contain at least one frequency channel (t1-t6) of a one-site repeat pattern.Type: GrantFiled: March 29, 1999Date of Patent: April 3, 2001Assignee: Motorola, Inc.Inventors: Howard Thomas, Jun Xiang, Simon Saunders
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Patent number: 6207734Abstract: An adhesive for applying to a creping surface in the process for dry creping tissue paper is disclosed. The adhesive comprises cationic starch and optionally a polyvinyl alcohol and a water-soluble, thermosetting, cationic polyamide-epihalohydrin resin. The adhesive provides high adhesion and doctorability for dry creping.Type: GrantFiled: February 24, 1999Date of Patent: March 27, 2001Assignee: The Procter & Gamble CompanyInventors: Kenneth Douglas Vinson, Howard Thomas Deason, Bart Steven Hersko
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Patent number: 6192245Abstract: A method for determining a handover for a mobile station (1) in a multicellular communication system having a serving cell (3), a plurality of neighboring cells (4,5), and at least one control cell where the cells include at least one macrocell (2) and a plurality of microcells. The method includes the steps of comparing the received signal of the control cell with a parameter value.Type: GrantFiled: March 2, 1998Date of Patent: February 20, 2001Assignee: Motorola, Inc.Inventors: Philip Jones, Howard Thomas, Keith Essam, Andrew Le Fleming
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Patent number: 6122674Abstract: A shared memory parallel processing system interconnected by a multi-stage network combines new system configuration techniques with special-purpose hardware to provide remote memory accesses across the network, while controlling cache coherency efficiently across the network. The system configuration techniques include a systematic method for partitioning and controlling the memory in relation to local verses remote accesses and changeable verses unchangeable data. Most of the special-purpose hardware is implemented in the memory controller and network adapter, which implements three send FIFOs and three receive FIFOs at each node to segregate and handle efficiently invalidate functions, remote stores, and remote accesses requiring cache coherency. The segregation of these three functions into different send and receive FIFOs greatly facilitates the cache coherency function over the network. In addition, the network itself is tailored to provide the best efficiency for remote accesses.Type: GrantFiled: September 10, 1999Date of Patent: September 19, 2000Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich
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Patent number: 6122659Abstract: A shared memory parallel processing system interconnected by a multi-stage network combines new system configuration techniques with special-purpose hardware to provide remote memory accesses across the network, while controlling cache coherency efficiently across the network. The system configuration techniques include a systematic method for partitioning and controlling the memory in relation to local verses remote accesses and changeable verses unchangeable data. Most of the special-purpose hardware is implemented in the memory controller and network adapter, which implements three send FIFOs and three receive FIFOs at each node to segregate and handle efficiently invalidate functions, remote stores, and remote accesses requiring cache coherency. The segregation of these three functions into different send and receive FIFOs greatly facilitates the cache coherency function over the network. In addition, the network itself is tailored to provide the best efficiency for remote accesses.Type: GrantFiled: September 10, 1999Date of Patent: September 19, 2000Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich
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Patent number: 6098123Abstract: A dynamic allocation system and method is provided for allocating memory bandwidth associated with a store and forward memory communicating between a node processsor and a network. Dynamic allocation is controlled by a state machine in a network adapter, which monitors on a real time basis the active users of the network adapter memory, the node processor writing or reading adapter memory, the network sending port, and the network receiving port. Bandwidths are allocated to users with instant response to user bandwidth demand changes. Programmable options allow a node processor to control bandwidth allocations for various user scenarios.Type: GrantFiled: May 8, 1997Date of Patent: August 1, 2000Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich
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Patent number: 6092155Abstract: A shared memory parallel processing system interconnected by a multi-stage network combines new system configuration techniques with special-purpose hardware to provide remote memory accesses across the network, while controlling cache coherency efficiently across the network. The system configuration techniques include a systematic method for partitioning and controlling the memory in relation to local verses remote accesses and changeable verses unchangeable data. Most of the special-purpose hardware is implemented in the memory controller and network adapter, which implements three send FIFOs and three receive FIFOs at each node to segregate and handle efficiently invalidate functions, remote stores, and remote accesses requiring cache coherency. The segregation of these three functions into different send and receive FIFOs greatly facilitates the cache coherency function over the network. In addition, the network itself is tailored to provide the best efficiency for remote accesses.Type: GrantFiled: July 10, 1997Date of Patent: July 18, 2000Assignee: International Business Machines CorporationInventor: Howard Thomas Olnowich