Patents by Inventor Hrishikesh Jayakumar

Hrishikesh Jayakumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11006044
    Abstract: Systems, methods, and non-transitory media are provided for power-efficient image stabilization. An example method can include collecting measurements from a motion sensor, the measurements being based on movement of an image sensor while capturing frames; calculating parameters for counteracting motions in a frame, wherein first parameters are based on the measurements and second parameters are based on some of the measurements; adjusting, in a first stabilization pass of a dual-pass stabilization process, the first frame according to the second parameters; adjusting, in a second stabilization pass of the dual-pass stabilization process, the first frame according to the first parameters; based on a second frame having less motion than the first frame, enabling for the second frame a single-pass stabilization process for both a frame preview process and video record process; and adjusting, in the single stabilization pass, the second frame according to parameters for counteracting motions in the second frame.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: May 11, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Hrishikesh Jayakumar, Edoardo Regini, Sungwon Lee, Hyukjune Chung
  • Patent number: 10591902
    Abstract: A microcontroller system which employs an intermediate approach in hybrid FRAM-SRAM that involves memory mapping of program sections to retain the reliability benefits provided by FRAM while performing almost as efficiently as an SRAM-based system. They system utilizes an energy-aware memory mapping method which maps different program sections to the hybrid FRAM-SRAM MCU such that energy consumption is minimized without sacrificing reliability. The method comprises a memory initialization map, which performs a one-time characterization to find the optimal memory map for the functions that constitute a program. The method further comprises an energy alignment, a hardware/software method that aligns the system's powered-on time intervals to function execution boundaries, which results in further improvements in energy efficiency and performance.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: March 17, 2020
    Assignee: Purdue Research Foundation
    Inventors: Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan
  • Publication number: 20170343987
    Abstract: A microcontroller system which employs an intermediate approach in hybrid FRAM-SRAM that involves memory mapping of program sections to retain the reliability benefits provided by FRAM while performing almost as efficiently as an SRAM-based system. They system utilizes an energy-aware memory mapping method which maps different program sections to the hybrid FRAM-SRAM MCU such that energy consumption is minimized without sacrificing reliability. The method comprises a memory initialization map, which performs a one-time characterization to find the optimal memory map for the functions that constitute a program. The method further comprises an energy alignment, a hardware/software method that aligns the system's powered-on time intervals to function execution boundaries, which results in further improvements in energy efficiency and performance.
    Type: Application
    Filed: January 3, 2017
    Publication date: November 30, 2017
    Applicant: Purdue Research Foundation
    Inventors: Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan