Patents by Inventor Hristo Tihomirov Kyurkchiev

Hristo Tihomirov Kyurkchiev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11210018
    Abstract: Method, apparatus and computer program product for linking data entries across data sources. For example, the apparatus includes at least one processor and at least one non-transitory memory including program code. The at least one non-transitory memory and the program code are configured to, with the at least one processor, store unlinked data entries in a staging memory area; store linked data entries in an active memory area; identifying a linked state status for the staging memory area, wherein the linked state status initially indicates a non-linked state; repeatedly performing one or more cross-data-source linking operations until the linked state status for the staging memory area indicates a linked state; and in response to determining that the linked state status for the staging memory area indicates the linked state, linking the multiple data entries by merging the staging memory area and the active memory area to generate linked data.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: December 28, 2021
    Assignee: Honeywell International Inc.
    Inventors: Miroslav Krasimirov Kramolinski, Ivan Valeriev Markov, Hristo Tihomirov Kyurkchiev
  • Publication number: 20200371707
    Abstract: Method, apparatus and computer program product for linking data entries across data sources. For example, the apparatus includes at least one processor and at least one non-transitory memory including program code. The at least one non-transitory memory and the program code are configured to, with the at least one processor, store unlinked data entries in a staging memory area; store linked data entries in an active memory area; identifying a linked state status for the staging memory area, wherein the linked state status initially indicates a non-linked state; repeatedly performing one or more cross-data-source linking operations until the linked state status for the staging memory area indicates a linked state; and in response to determining that the linked state status for the staging memory area indicates the linked state, linking the multiple data entries by merging the staging memory area and the active memory area to generate linked data.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 26, 2020
    Inventors: Miroslav Krasimirov Kramolinski, Ivan Valeriev Markov, Hristo Tihomirov Kyurkchiev