Patents by Inventor Hsaio-Yu LIN

Hsaio-Yu LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9773842
    Abstract: Memory devices are provided. The memory device includes a substrate. A dielectric layer is disposed on the substrate and a plurality of resistive memory cells is disposed on the dielectric layer. Each resistive memory cell includes a via disposed in a first opening of the dielectric layer. A conductive layer is disposed on the via. The memory device further includes a capacitor structure including a bottom electrode, a variable resistance layer disposed on the bottom electrode and a top electrode disposed on the variable resistance layer, wherein the bottom electrode is disposed on the conductive layer.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: September 26, 2017
    Assignee: Winbond Electronics Corp.
    Inventors: Tso-Hua Hung, Kao-Tsair Tsai, Hsaio-Yu Lin, Bo-Lun Wu, Ting-Ying Shen
  • Publication number: 20170186814
    Abstract: Memory devices are provided. The memory device includes a substrate. A dielectric layer is disposed on the substrate and a plurality of resistive memory cells is disposed on the dielectric layer. Each resistive memory cell includes a via disposed in a first opening of the dielectric layer. A conductive layer is disposed on the via. The memory device further includes a capacitor structure including a bottom electrode, a variable resistance layer disposed on the bottom electrode and a top electrode disposed on the variable resistance layer, wherein the bottom electrode is disposed on the conductive layer.
    Type: Application
    Filed: August 8, 2016
    Publication date: June 29, 2017
    Inventors: Tso-Hua HUNG, Kao-Tsair TSAI, Hsaio-Yu LIN, Bo-Lun WU, Ting-Ying SHEN