Abstract: A digital audio/video playback system capable of controlling audio and video playback speed for decoding a digital audio/video signal and then outputting such signal. The system includes: a loader configured to receive the digital audio/video signals, a parser configured to resolve the digital audio/video signals into a video bitstream and an audio bitstream, a video decoder and an audio decoder respectively configured to receive and decode the video bitstream and the audio bitstream, and a playback speed controller configured to adjust the sound frequency of the decoded audio based on a set playback speed and output the decoded video/audio at the set playback speed.

Abstract: A floppy module includes a floppy disk controller (FDC), a control circuit, and a display. The FDC has a first control terminal, a second control terminal, and a plurality of third control terminals. Wherein, the first control terminal and the second control terminal may respectively output a first control signal and a second control signal, and the first and second control signals having the same statuses are used for controlling a floppy disk. The display has a fourth control terminal and a plurality of data terminals respectively coupled to a portion of the third control terminals. Additionally, the control circuit may use the first control signal to replace the second control signal for controlling the floppy disk, and transmit the second control signal to the fourth control terminal such that a status information is shown on the display as the floppy disk being idle.

Abstract: A keyboard-mouse switch is disclosed. The keyboard-mouse switch mentioned above is embedded in a computer apparatus and includes an information monitoring unit, a hot-key look up table and a hot-key identification controller. The information monitoring unit receives input information generated by at least one of a keyboard and a mouse. The hot-key look up table stores at least start up hot-key information. The hot-key identification controller receives the start up hot-key information and the input information. The hot-key identification identifies whether the input information is hot-key information or not and dis/enables the input information to be transmitted to the computer apparatus according to the start up hot-key information and the hot-key information.

Abstract: A digital audio/video playback system capable of controlling audio and video playback speed for decoding a digital audio/video signal and then outputting such signal. The system includes: a loader configured to receive the digital audio/video signals, a parser configured to resolve the digital audio/video signals into a video bitstream and an audio bitstream, a video decoder and an audio decoder respectively configured to receive and decode the video bitstream and the audio bitstream, and a playback speed controller configured to adjust the sound frequency of the decoded audio based on a set playback speed and output the decoded video/audio at the set playback speed.

Abstract: The present invention discloses a security system for a software. The security system for a software includes an IC card interface electrically connected to the input/output interface of the computer, and an IC card storing therein a computer authentication signal of the software for reading a user authentication signal sent by the software via the IC card interface, checking if the user authentication signal is consistent with the computer authentication signal, and sending a confirmation signal to initiate the software when the user authentication signal is consistent with the computer authentication signal.

Abstract: A dual purpose printer interface device has a printer connector, a printer interface, a joystick interface, a power generator, a mode selection circuit and a selection device. The mode selection circuit to automatically select the desire mode so that once the printer or the joystick are plugged into the printer connector the mode selection circuit automatically generate the proper mode selection signal to switch the operation mode. Users can just simply plug in the printer or the joystick without any further action to switch the operation mode.

Abstract: A method is provided for use on a PCI-compliant (Peripheral Component Inter-connection) interface card having a UART (Universal Asynchronous Receiver-Transmitter) unit to generate a near-1.8432 MHz clock signal for clocking the UART unit. This method includes a first step of dividing a selected PCI clock signals, such as the 33 MHz PCI clock signal, from the PCI local bus by a predetermined integer frequency divisor; and a second step of multiplying the resulted frequency from the division by a predetermined integer frequency multiplier that allows the resulted frequency to be substantially close to 1.8432 MHz to serve as the intended clock signal to the UART unit. Preferably, the integer frequency multiplier is in the range equal to or greater than 8. This method can generate a more precise clock signal for the UART unit on the PCI-compliant interface card without having to use an external crystal oscillator. Moreover, the method requires only a frequency divider without a frequency multiplier to implement.

Abstract: A UART having an IC card reading interface comprises a universal asynchronous communication core, a multiplexer and a 3-state control I/O buffer. The universal asynchronous communication core is responsible for an asynchronous serial communication. The multiplexer and the 3-state control I/O buffer enable serial output signal and serial input signal pins have different functions during an IC card reading mode and a universal asynchronous receive/transmit mode. An IC card reading system includes an IC card reader having an IC card socket and a smart card interface and a computer system having the UART with the IC card reading interface. Since the UART with an IC card reading interface can be directly electrically connected to the smart card interface of the IC card reader, a micro-controller and a receiver-transmitter can be saved in the IC card reader.

Abstract: An architecture for microcontroller with embedded flash memory is provided. The microcontroller allows the reprogramming of data into the embedded flash memory of the microcontroller to be performed on-board without having to dismount the entire IC package of the microcontroller from the circuit board and then use a dedicated writer to perform the write operation. The reprogramming operation can be initiated either by an external reprogramming-enable signal or an internal reprogramming-enable signal. When either of these two signals is generated, it causes an OR gate to output a high-voltage logic signal to a multiplexer to thereby cause the multiplexer to select a ROM unit for connection to the microprocessor unit. This allows the microprocessor unit to execute a reprogramming control routine stored in the ROM unit. The flash memory unit further stores a reprogramming detection/initialization routine which checks whether a flash reprogramming request signal is issued from the main-unit interface.

Abstract: A memory device having a redundant memory block according to the invention is disclosed. The memory device includes a main memory block, a redundant memory block, a first decoder, a second decoder and an address control circuit. The address control circuit is used to set an address corresponding to another address where a certain defective byte of memory bytes is located. When an external address signal is identical to the address set by the address control circuit, the address is transferred to a redundant memory block, so that the defective byte of memory cells can be replaced with a spare byte of memory cells, thereby increasing manufacturing yield.

Abstract: A microcomputer with embedded flash memory is provided, which has an on-chip programming capability that allows new data to be reprogrammed by the microcomputer itself into the embedded flash memory, without having to use external reprogramming tools. Moreover, a method is provided for programming data into the embedded flash memory of the microcomputer. The microcomputer includes a microprocessor unit, an embedded flash memory unit, a register set, and a bus multiplexer. The embedded flash memory unit is partitioned into a loader block for storing a loader program and a user block for storing at least one user application program. The new data that are to be programmed into the user block of the embedded flash memory unit are first transferred to and stored in the register set. In the embedded flash memory unit, only one of the loader block and the user block can be in active operation, which is controlled by the microprocessor unit.

Abstract: An apparatus and the method for upgrading the firmware code of an optical disk drive via the ATA/IDE interface are disclosed. The optical disk drive has a firmware code memory and a microcontroller that executes the firmware code. A drive decoder decodes to connect the optical disk drive to a host computer system via the ATA/IDE interface. The apparatus includes a programming controller that receives signals from the ATA/IDE interface and performs input/output decode to determine whether the host computer system has requested an upgrade of the firmware or to maintain the optical disk drive in normal operation. A multiplexer has a first input connected to the programming controller, and the second input connected to the microcontroller. The multiplexer selects the first input to the memory device via the multiplexed output for performing a firmware upgrade operation when the host computer system requests a firmware upgrade.

Abstract: A circuit arrangement between an input/output (I/O) integrated circuit (IC) and an I/O coupler IC includes a first universal asynchronous receiver-transmitter (UART) and a second UART provided within the I/O IC, each of the UART having a plurality of output serial terminals and input serial terminals, a first pulse position modulation (PPM) circuit connected to the parallel output terminals of the first UART and the second UART and having an output pin, a first pulse position demodulation (PPDM) circuit connected to the parallel input terminals of the first UART and the second UART and having two input pins, a second PPDM circuit provided within the I/O coupler IC and connected to the output pin of the first PPM circuit with two sets of output terminals, a second PPM circuit provided within the I/O coupler IC and connected to the input pins of the first PPDM circuit with two sets of input terminals, two voltage converters each respectively connected with a set of input terminals of the second PPM circuit and

Abstract: A method is provided to input an address signal A.sub..o slashed., A.sub.1, A.sub.2 .about.A.sub.n-1, A.sub.n to an integrated circuit. The integrated circuit includes an address decoder for providing a select signal. The method includes (1) inputting value of A.sub.1, A.sub.3 .about.A.sub.n to the address decoder during a first time interval, and, during the first time interval, an access-control signal being disabled to prohibit access operation by the integrated circuit; and (2) inputting value of A.sub.526, A.sub.2 .about.A.sub.n-1 to the address decoder during a second time interval, and, during the second time interval, the access-control signal being enabled to allow access operation corresponding to address value of A.sub.526, A.sub.1, A.sub.2 .about.A.sub.n-1, A.sub.n.

Abstract: A dual purpose printer interface device includes a printer interface circuit connected to a host computer and a printer connector to which a printer is to be connected. An adaptor can connect removably a joystick to the connector. A joystick interface circuit is connected to the computer and the connector. A first selecting unit connects electrically the computer to the printer and joystick interface circuits and is operable selectively in a first mode, wherein the printer interface circuit is connected electrically to the computer and the joystick interface circuit is disconnected from the computer, and in a second mode, wherein the joystick interface circuit is connected electrically to the computer and the printer interface circuit is disconnected from the computer. A second selecting unit connects electrically the connector to the printer and joystick interface circuits.