Patents by Inventor Hsi-Liang Lu

Hsi-Liang Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Clock generator using passive mixer and associated clock generating method
    Patent number: 10084438
    Abstract: A clock generator has a buffer stage circuit, a passive mixer, and a channel selecting circuit. The buffer stage circuit receives a plurality of first reference clocks having a same first frequency but different phases. The passive mixer receives the first reference clocks from the buffer stage circuit, receives a plurality of second reference clocks having a same second frequency but different phases, and mixes the first reference clocks and the second reference clocks to generate a mixer output, wherein the second frequency is different from the first frequency. The channel selecting circuit extracts a plurality of third reference clocks from the mixer output, wherein the third reference clocks have a same third frequency but different phases, and the third frequency is different from the first frequency and the second frequency.
    Type: Grant
    Filed: January 22, 2017
    Date of Patent: September 25, 2018
    Assignee: MEDIATEK INC.
    Inventor: Hsi-Liang Lu
  • CLOCK GENERATOR USING PASSIVE MIXER AND ASSOCIATED CLOCK GENERATING METHOD
    Publication number: 20170272062
    Abstract: A clock generator has a buffer stage circuit, a passive mixer, and a channel selecting circuit. The buffer stage circuit receives a plurality of first reference clocks having a same first frequency but different phases. The passive mixer receives the first reference clocks from the buffer stage circuit, receives a plurality of second reference clocks having a same second frequency but different phases, and mixes the first reference clocks and the second reference clocks to generate a mixer output, wherein the second frequency is different from the first frequency. The channel selecting circuit extracts a plurality of third reference clocks from the mixer output, wherein the third reference clocks have a same third frequency but different phases, and the third frequency is different from the first frequency and the second frequency.
    Type: Application
    Filed: January 22, 2017
    Publication date: September 21, 2017
    Inventor: Hsi-Liang Lu