Abstract: The light-guide module for emitting particular polarized light beams includes a splitter for separating non-polarized light beams, a transformer for converting polarization of light beams, and a non-polarized light source. The non-polarized light source emits light beams. Particular polarized light beams pass the splitter and other light beams are reflected by the splitter. Polarizations of reflected light beams and of light beams emitted by the non-polarized light source are converted by the transformer so as to separate the light beams later. Thus the light-guide module for emitting particular polarized light beams loses relatively little light energy.

Abstract: In order to develop a production type of ring laser gyroscope (RLG), the determination of a laser plane for the assembly of the optical mirrors in a RLG block is needed. The new methods for measuring RLG cavities and for calculating the accuracy of the laser plane are developed. The optimum reflecting points and the error tolerances of the laser beams are obtained by using these methods. The advantages of these new methods are that both the design accuracy and the production time of the RLG block can be reduced as well as the yield rate of RLG could increase.

Abstract: A method of manufacturing a color filter for a reflective liquid crystal display is disclosed. The method comprises the following steps: 1) coating a layer of positive photoresist on a reflective layer or reflective substrate, and exposing the photoresist layer to a light via a mask having a fine pixel pattern so as to form at least three exposed regions of different exposed energy in the photoresist layer, 2) Removing one of the existing exposed regions having a largest exposed dose by the use of an alkaline developer solution so as to expose the surface of the electrically conductive reflective substrate corresponding to the removed region; and electrodepositing a color paint on the exposed surface of the reflective substrate to form a color filter layer of one selected color, 3) repeating step 2) to remove the other exposed regions in the photoresist layer and proceeding with an electrodeposition process with another color paint until a color filter layer of all desired colors is completed.

Abstract: The invention discloses a liquid crystal panel which is characterized in that each color filter is compartmentalized by the black matrix and the spacers are positioned on the region confined by the black matrix and the spacer bottom connects the first conductive film. The invention also discloses a process for producing liquid crystal panel, which is characterized in that the color filters and spacers are produced by coating a four-level photoresist and by a first exposure step which is masked by a four-level photoresist; the red region, green region and blue region are produced by development and electro-deposition; and the spacers are produced by a second exposure step which is masked by a spacer reticle, a development step which emerges the first conductive film within a region confined by the black matrix, and a step of electrodeposition coating compositions on the emerged region of the first conductive film.

Abstract: The invention relates to a method for manufacturing color filters utilizing a color electrodeposition coating which contains an anionic electrodeposition resin having a low acid value.

Abstract: A CMOS integrated circuit structure with planarized self-aligned transistors and local planarization in the vicinity of the transistors so as to allow an interconnect, with a planar upper surface, which is free of bridging, has good continuity over the planarized topography and is compatible with self-alignment schemes, hence conserving chip real estate. The structure is compatible with planarization using BPSG, BPTEOS, SOG or CMP. After formation of self-aligned insulated transistor gates and active transistor regions, a "landing pad" is formed on the substrate at the buried contact and polyiso contact locations so as to allow more effective etching at the exact location of the buried contact and polyiso contact. Then the integrated circuit structure is locally planarized by formation of an oxide layer and a reflowed overlying glass layer. The glass layer is etched back to planarize the surface.

Abstract: An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.

Abstract: An MOS transistor for use in an integrated circuit, particularly CMOS integrated circuits, is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of titanium silicide encapulated by a thin film of titanium nitride.

Abstract: An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.

Abstract: A folding road barrier includes a cross member, two folding stands pivotal connected to two opposite ends of the cross member at the bottom, a shade roller supported on and turned between two supports on the front side of the cross member for showing warning words, a signal lamp assembly mounted on the cross member at the top and controlled to give a flashing signal.

Abstract: A load resistor for use in a semiconductor integrated circuit consists of two portions of conductive material, typically strips of either a silicide or a composite polycrystalline silicon layer and silicide layer formed thereon, formed on a semiconductor substrate and separated from each other by a selected distance. An electrically conductive dopant diffusion barrier is formed on the first and second portions of conductive material. A polycrystalline silicon material is then placed on the structure such that one portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the first portion of conductive material and the other portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the second portion of conductive material. Typically the polycrystalline silicon material is placed on an insulation layer formed on the semiconductor substrate in the portion of the substrate between the two portions of conductive material.

Abstract: A load resistor for use in a semiconductor integrated circuit consists of two portions of conductive material, typically strips of either a silicide or a composite polycrystalline silicon layer and silicide layer formed thereon, formed on a semiconductor substrate and separated from each other by a selected distance. An electrically conductive dopant diffusion barrier is formed on the first and second portions of conductive material. A polycrystalline silicon material is then placed on the structure such that one portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the first portion of conductive material and the other portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the second portion of conductive material. Typically the polycrystalline silicon material is placed on an insulation layer formed on the semiconductor substrate in the portion of the substrate between the two portions of conductive material.

Abstract: An MOS transistor for use in an integrated circuit, particularly CMOS integrated circuits, is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from short circuiting to the gate by oxide insulation between source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of titanium silicide encapsulated by a thin film of titanium nitride.

Abstract: A compact cell design for a static random access memory cell is achieved. The cell has two transistors with gates substantially parallel to each other. One interconnect connects the gate of one transistor to an electrode of the other transistor. Another interconnect connects the gate of the other transistor to an electrode of the first transistor. The two gates and the two interconnects form substantially a rectangle. A power supply circiut line is disposed outside the rectangle. This line and the two interconnects are formed from one conductive layer.

Abstract: A three-layer metal contact including aluminum is provided for silicon-based semiconductor devices to minimize the effects of formation of silicon precipitates in the aluminum layer and low contact junction leakage. The metal contact comprises a first layer of a refractory metal silicide formed on a silicon surface, an intermediate layer of aluminum formed on the refractory metal silicide and a top layer of a refractory metal silicide formed on the layer of aluminum. Where contact is made to polysilicon layers forming high resistance load resistors, the metal contact of the invention prevents reduction in resistance resulting from the interdiffusion of silicon and aluminum.

Abstract: A three-layer metal contact including aluminum is provided for silicon-based semiconductor devices to minimize the effects of formation of silicon precipitates in the aluminum layer and low contact junction leakage. The metal contact comprises a first layer of a refractory metal silicide formed on a silicon surface, an intermediate layer of aluminum formed on the refractory metal silicide and a top layer of a refractory metal silicide formed on the layer of aluminum. Where contact is made to polysilicon layers forming high resistance load resistors, the metal contact of the invention prevents reduction in resistance resulting from the interdiffusion of silicon and aluminum.