Patents by Inventor HsiangChih Sun

HsiangChih Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bipolar and FET Device Structure
    Publication number: 20120112243
    Abstract: A semiconductor structure includes a heterojunction bipolar transistor (HBT) including a collector layer located over a substrate, the collector layer including a semiconductor material, and a field effect transistor (FET) located over the substrate, the FET having a channel formed in the semiconductor material that forms the collector layer of the HBT.
    Type: Application
    Filed: November 4, 2010
    Publication date: May 10, 2012
    Inventors: Peter J. Zampardi, HsiangChih Sun
  • Bipolar/dual FET structure having FETs with isolated channels
    Patent number: 8026555
    Abstract: According to an exemplary embodiment, a bipolar/dual FET structure includes a bipolar transistor situated over a substrate. The bipolar/dual FET structure further includes an enhancement-mode FET and a depletion-mode FET situated over the substrate. In the bipolar/dual FET structure, the channel of the enhancement-mode FET is situated above the base of the bipolar transistor and the channel of the depletion-mode FET is situated below the base of the bipolar transistor. The channel of the enhancement-mode FET is isolated from the channel of the depletion-mode FET so as to decouple the enhancement-mode FET from the depletion mode FET.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: September 27, 2011
    Assignee: Skyworks Solutions, Inc.
    Inventors: Peter J. Zampardi, HsiangChih Sun
  • Bipolar/Dual FET Structure Having FETs With Isolated Channels
    Publication number: 20100237433
    Abstract: According to an exemplary embodiment, a bipolar/dual FET structure includes a bipolar transistor situated over a substrate. The bipolar/dual FET structure further includes an enhancement-mode FET and a depletion-mode FET situated over the substrate. In the bipolar/dual FET structure, the channel of the enhancement-mode FET is situated above the base of the bipolar transistor and the channel of the depletion-mode FET is situated below the base of the bipolar transistor. The channel of the enhancement-mode FET is isolated from the channel of the depletion-mode FET so as to decouple the enhancement-mode FET from the depletion mode FET.
    Type: Application
    Filed: June 2, 2010
    Publication date: September 23, 2010
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Peter J. Zampardi, HsiangChih Sun
  • Hyperabrupt Diode Structure And Method For Making Same
    Publication number: 20100213513
    Abstract: A hyperabrupt diode structure includes a substrate formed from a low-ohmic contact material, a graded semiconductor layer comprising gallium arsenide, an offset layer comprising indium gallium phosphide over the graded semiconductor layer, a contact layer comprising gallium arsenide over the offset layer, a first electrical contact on the substrate, the first electrical contact forming a cathode of the hyperabrupt diode structure, and a second electrical contact over the contact layer, the second electrical contact forming an anode of the hyperabrupt diode structure.
    Type: Application
    Filed: February 26, 2009
    Publication date: August 26, 2010
    Applicant: Skyworks Solutions, Inc.
    Inventors: Peter J. Zampardi, HsiangChih Sun