Patents by Inventor Hsiang-Hsien Chung

Hsiang-Hsien Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9923099
    Abstract: A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: March 20, 2018
    Assignee: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Chin-Tzu Kao, Ya-Ju Lu, Hsiang-Hsien Chung, Wen-Cheng Lu
  • Publication number: 20160126358
    Abstract: A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.
    Type: Application
    Filed: January 13, 2016
    Publication date: May 5, 2016
    Inventors: Chin-Tzu KAO, Ya-Ju LU, Hsiang-Hsien CHUNG, Wen-Cheng LU
  • Patent number: 9269827
    Abstract: A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: February 23, 2016
    Assignee: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Chin-Tzu Kao, Ya-Ju Lu, Hsiang-Hsien Chung, Wen-Cheng Lu
  • Publication number: 20150372150
    Abstract: A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain, A TFT is also provided.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 24, 2015
    Inventors: Chin-Tzu KAO, Ya-Ju LU, Hsiang-Hsien CHUNG, Wen-Cheng LU
  • Publication number: 20130200374
    Abstract: A thin film transistor is provided. The thin film transistor disposed on a substrate includes a gate electrode, a gate dielectric layer, a patterned semiconductor layer, a source electrode, a drain electrode covered with an anticorrosive conductive layer, a patterned passivation layer and a transparent conductive layer. The anticorrosive conductive layer includes indium tin oxide or indium zinc oxide, and is used to prevent the drain electrode from being over etched during the process of etching the passivation layer. A method for manufacturing the thin film transistor is also provided herein.
    Type: Application
    Filed: August 24, 2012
    Publication date: August 8, 2013
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Yi-Fan Lee, Hsiang-Hsien Chung
  • Patent number: 7855383
    Abstract: A semiconductor device and its manufacturing method are disclosed. The nitrogen flow is gradually changed to form a semiconductor device with a gate or a source/drain having a nitrified gradient layer structure. Different extents of nitrification inside the nitrified gradient layer structure provide protection and buffering to prevent the undercut after etching due to different materials in the multilayer structure or the interface effect.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: December 21, 2010
    Assignee: ChungHwa Picture Tubes, Ltd.
    Inventors: Ching-Yeh Kuo, Tsung-Chi Cheng, Yu-Chou Lee, Yea-Chung Shih, Wen-Kuang Tsao, Hsiang-Hsien Chung, Hung-Yi Hsu, Jui-Chung Chang
  • Patent number: 7800109
    Abstract: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of aluminum-yttrium alloy nitride. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source electrode and the drain electrode are disposed over the semiconductor layer.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: September 21, 2010
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Wen-Kuang Tsao, Hung-I Hsu, Hsiang-Hsien Chung, Min-Huang Chen
  • Publication number: 20080121521
    Abstract: A plasma sputtering target assembly and a method therefor are provided. The sputtering target assembly includes a target, a bonding layer having a plurality of particles and having a first side bonded with the target and second side, and a backplate bonded with the second side of the bonding layer. The particles are being provided when the backplate is heated. Alternatively, a plurality of protrusions is formed on the backplate and the bonding layer is larger than or equal to the protrusions in altitude. Since the bonding layer has a composition and sputter yield of the part different from that of the target, in sputtering, the bonding layer is made exposed to plasma and thus an exceptional discharging phenomenon is caused when the target is struck through. By detecting the phenomenon, whether the target is almost over-sputtered may be forecasted and the backplate may be prevented from being struck through.
    Type: Application
    Filed: August 15, 2006
    Publication date: May 29, 2008
    Inventors: Hsiang-Hsien Chung, Wen-Kuang Tsao, Hung-Yi Hsu, Chien-Yu Chen
  • Publication number: 20080061327
    Abstract: A semiconductor device and its manufacturing method are disclosed. The nitrogen flow is gradually changed to form a semiconductor device with a gate or a source/drain having a nitrified gradient layer structure. Different extents of nitrification inside the nitrified gradient layer structure provide protection and buffering to prevent the undercut after etching due to different materials in the multilayer structure or the interface effect.
    Type: Application
    Filed: November 7, 2007
    Publication date: March 13, 2008
    Applicant: Chunghwa Picture Tubes., Ltd.
    Inventors: Ching-Yeh Kuo, Tsung-Chi Cheng, Yu-Chou Lee, Yea-Chung Shih, Wen-Kuang Tsao, Hsiang-Hsien Chung, Hung-Yi Hsu, Jui-Chung Chang
  • Publication number: 20060237724
    Abstract: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a soruce/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of aluminum-yttrium alloy nitride. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
    Type: Application
    Filed: April 22, 2005
    Publication date: October 26, 2006
    Inventors: Wen-Kuang Tsao, Hung-I Hsu, Hsiang-Hsien Chung, Min-Huang Chen
  • Publication number: 20060197089
    Abstract: A semiconductor device and its manufacturing method are disclosed. The nitrogen flow is gradually changed to form a semiconductor device with a gate or a source/drain having a nitrified gradient layer structure. Different extents of nitrification inside the nitrified gradient layer structure provide protection and buffering to prevent the undercut after etching due to different materials in the multilayer structure or the interface effect.
    Type: Application
    Filed: March 3, 2005
    Publication date: September 7, 2006
    Applicant: Chunghwa Picture Tubes., Ltd.
    Inventors: Ching-Yeh Kuo, Tsung-Chi Cheng, Yu-Chou Lee, Yea-Chung Shih, Wen-Kuang Tsao, Hsiang-Hsien Chung, Hung-Yi Hsu, Jui-Chung Chang
  • Publication number: 20060144696
    Abstract: A magnetron sputtering process is provided. First, a reaction chamber including a substrate base, a target comprised of Al or its alloy or other metals or their alloy with higher melting point, and a magnetron device. Next, a substrate is disposed onto the substrate base. The pressure within the reaction chamber is set from 0.1 pa˜0.35 pa, and then a sputtering process is initiated within the reaction chamber to deposit a film on the substrate. Because the pressure within the reaction chamber is set from 0.1 pa˜0.35 pa, a better step coverage can be achieved during the sputtering process so that a continuous film can be deposited on the substrate without the broken or defective climbing portion of the film. Therefore, the yield of film deposition on the substrate can also be significantly increased.
    Type: Application
    Filed: May 6, 2005
    Publication date: July 6, 2006
    Inventors: Yu-Chou Lee, Hsiang-Hsien Chung, Hung-I Hsu