Patents by Inventor Hsiang-Hsing Liu

Hsiang-Hsing Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for reducing acidic contamination on a process wafer following an etching process
    Patent number: 6805752
    Abstract: A method and system for reducing acidic contamination on a process wafer following a plasma etching process including; providing an ambient controlled heating chamber for accepting transfer of a process wafer under controlled ambient conditions; transferring the process wafer to the heating chamber under controlled ambient conditions following plasma etching of the process wafer; providing a heat exchange surface within the heating chamber for mounting the process wafer in heat exchange relationship thereto; mounting the process wafer on a heat exchange surface contained within the heating chamber; and, heating the process wafer to a temperature sufficient to vaporize an acidic residue thereon to form acidic vapors; and, removing the acidic vapors from the heating chamber.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: October 19, 2004
    Assignee: Taiwan SEmiconductor Manufacturing Co., Ltd
    Inventors: Chih-Yung Chang, Hsiang-Hsing Liu, Shiou Fieng-Chang Chien
  • Plasma etch chamber equipped with multi-layer insert ring
    Publication number: 20040000375
    Abstract: A multi-layer insert ring for engaging a shadow ring in a plasma etch chamber which includes at least two layers stacked together in an opening of the shadow ring. The multi-layer insert ring may be constructed by two layers or three layers by utilizing ground, reprocessed insert rings resulting in significant cost savings. Each of the layers of the multi-layer insert rings has a planar top surface and a planar bottom surface that is parallel to the planar top surface. Only the top layer need to be replaced after repeated usage of the insert ring in plasma etching processes.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 1, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiang-Hsing Liu, Chung-Feng Huang, Yang-Kai Fan, Kwang-Niang Tan, Wen-Chin Tseng
  • Method and apparatus for reducing acidic contamination on a process wafer following an etching process
    Publication number: 20030066545
    Abstract: A method and system for reducing acidic contamination on a process wafer following a plasma etching process including; providing an ambient controlled heating chamber for accepting transfer of a process wafer under controlled ambient conditions; transferring the process wafer to the heating chamber under controlled ambient conditions following plasma etching of the process wafer; providing a heat exchange surface within the heating chamber for mounting the process wafer in heat exchange relationship thereto; mounting the process wafer on a heat exchange surface contained within the heating chamber; and, heating the process wafer to a temperature sufficient to vaporize an acidic residue thereon to form acidic vapors; and, removing the acidic vapors from the heating chamber.
    Type: Application
    Filed: October 10, 2001
    Publication date: April 10, 2003
    Applicant: Tawain Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Yung Chang, Hsiang-Hsing Liu, Shiou Fieng-Chang Chien