Patents by Inventor Hsiang Ju Huang

Hsiang Ju Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PRINTED CIRCUIT BOARD HAVING A SACRIFICIAL PAD TO MITIGATE GALVANIC CORROSION
    Publication number: 20230337372
    Abstract: In one example, the present application describes a Printed Circuit Board (PCB) that mitigates galvanic corrosion during an Organic Solderability Preservative (OSP) process used during fabrication of the PCB. The PCB includes a first metal pattern and a second metal pattern electrically coupled to each other, where the first and second metal patterns are different metals. The first metal pattern has a first area that is exposed by a solder mask layer, and the second metal pattern has a second area that is exposed by the solder mask area. A ratio of the first area to the second area is less than a threshold ratio to mitigate the galvanic corrosion of the second metal pattern exposed on the PCB during the OSP process.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 19, 2023
    Inventors: Songtao Lu, Hsiang Ju Huang, Binbin Zheng, Cheng-Hsiung Yang, Chien-Te Chen
  • Semiconductor device including contact fingers on opposed surfaces
    Patent number: 11139277
    Abstract: A land grid array semiconductor device is disclosed which is configured for removable insertion to and from a host device. The land grid array semiconductor device may include a first set of one or more contact fingers on the first surface of the land grid array semiconductor device, and a second set of one or more contact fingers on the second surface of the land grid array semiconductor device. In order to electrically couple the second set of one or more contact fingers, one or more electrical connectors may be provided physically extending between the second set of one or more contact fingers and at least one of the substrate and the at least one semiconductor die.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: October 5, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Chien Te Chen, Cong Zhang, Hsiang Ju Huang, Xuyi Yang, Yu Ying Tan, Han-Shiao Chen
  • SEMICONDUCTOR DEVICE INCLUDING CONTACT FINGERS ON OPPOSED SURFACES
    Publication number: 20200411478
    Abstract: A land grid array semiconductor device is disclosed which is configured for removable insertion to and from a host device. The land grid array semiconductor device may include a first set of one or more contact fingers on the first surface of the land grid array semiconductor device, and a second set of one or more contact fingers on the second surface of the land grid array semiconductor device. In order to electrically couple the second set of one or more contact fingers, one or more electrical connectors may be provided physically extending between the second set of one or more contact fingers and at least one of the substrate and the at least one semiconductor die.
    Type: Application
    Filed: March 10, 2020
    Publication date: December 31, 2020
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Chien Te Chen, Cong Zhang, Hsiang Ju Huang, Xuyi Yang, Yu Ying Tan, Han-Shiao Chen