Patents by Inventor Hsiang Lee
Hsiang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240147658Abstract: A fan module and computing device with the fan module are disclosed. The fan module includes a handle configured to actuate between an operation state and a release state. The handle in the release state allows a user to vertically remove the fan module from its respective fan module slot and away from the bottom panel.Type: ApplicationFiled: January 11, 2023Publication date: May 2, 2024Inventors: Chao-Jung CHEN, Chih-Hsiang LEE, Wei-Pin CHEN, Jyue HOU, Cheng-Chieh WENG
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Publication number: 20240143182Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving multiple read commands at least instructing to read first data stored in a first plane and second data stored in a second plane from a host system; sending multiple read command sequences at least instructing to execute a first read operation on the first plane to obtain the first data and to execute a second read operation on the second plane to obtain the second data according to the read commands; determining a data transmission order according to performance of the first read operation and the second read operation; and sequentially receiving the first data and the second data from a rewritable non-volatile memory module according to the data transmission order.Type: ApplicationFiled: November 25, 2022Publication date: May 2, 2024Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Hsiang Lee
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Publication number: 20240132496Abstract: An ionic compound, an absorbent and an absorption device are provided. The ionic compound has a structure represented by Formula (I): ABn, ??Formula (I) wherein A is B is R1, R2, R3, R4, R5, and R6 are independently H, C1-6 alkyl group; and n is 1 or 2.Type: ApplicationFiled: June 9, 2023Publication date: April 25, 2024Applicant: Industrial Technology Research InstituteInventors: Wei-Chih LEE, Yi-Hsiang CHEN, Chih-Hao CHEN, Ai-Yu LIOU, Jyi-Ching PERNG, Jiun-Jen CHEN
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Patent number: 11968293Abstract: Context information of a handshake between a source entity and a target entity is obtained at a security proxy. The context information is transmitted from the security proxy to a key manager. The key manager maintains a first private key of the security proxy. A first handshake message is received from the key manager. The first handshake message is generated at least based on the context information and signed with the first private key. The first handshake message is then transmitted to the target entity.Type: GrantFiled: November 18, 2020Date of Patent: April 23, 2024Assignee: International Business Machines CorporationInventors: Wei-Hsiang Hsiung, Chun-Shuo Lin, Wei-Jie Liau, Cheng-Ta Lee
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Publication number: 20240130140Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.Type: ApplicationFiled: December 26, 2023Publication date: April 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
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Patent number: 11961768Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: GrantFiled: May 5, 2023Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
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Package structure comprising buffer layer for reducing thermal stress and method of forming the same
Patent number: 11961777Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.Type: GrantFiled: June 27, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chih Chen, Chien-Hsun Lee, Chung-Shi Liu, Hao-Cheng Hou, Hung-Jui Kuo, Jung-Wei Cheng, Tsung-Ding Wang, Yu-Hsiang Hu, Sih-Hao Liao -
Patent number: 11961770Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.Type: GrantFiled: November 4, 2021Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
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Patent number: 11962239Abstract: A control circuit of a power converter and a control method thereof are provided. The control circuit includes an error amplifier, a controller, a digital filter, and a digital pulse width signal modulator. The error amplifying circuit is coupled to an output terminal of the power converter and provides a digital error signal. The controller provides a first working parameter corresponding to the first external control command when receiving a first external control command. The digital filter generates a current digital compensation value. The digital pulse width signal modulator generates a pulse width modulation signal. The controller provides a second working parameter corresponding to the second external control command when receiving a second external control command. The controller calculates a transition value according to the second working parameter and the current digital compensation value. The controller provides the second working parameter and the transition value to the digital filter.Type: GrantFiled: September 16, 2022Date of Patent: April 16, 2024Assignee: uPI Semiconductor Corp.Inventors: Yun-Kuo Lee, Wei-Hsiang Wang, Yen-Chih Lin, Wei-Hsiu Hung
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Publication number: 20240120812Abstract: An integrated motor and drive assembly is disclosed and includes a housing, a motor and a drive. The housing includes a motor-accommodation portion and a drive-accommodation portion. The drive includes a power board and a control board. The power board is made of a high thermal conductivity substrate and includes a power element and an encoder disposed on the first side, the first side faces the motor, the power board and the motor are stacked along a first direction, and the second side contacts the housing to from a heat-dissipating route. The control board is disposed adjacent to the power board. The control board and the power board are arranged along a second direction perpendicular to the first direction, and the first direction is parallel to an axial direction of the motor. A part of the power board and a part of the control board are directly contacted to form an electrical connection.Type: ApplicationFiled: July 17, 2023Publication date: April 11, 2024Inventors: Chi-Hsiang Kuo, Yi-Yu Lee, Zuo-Ying Wei, Yuan-Kai Liao, Wen-Cheng Hsieh
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Patent number: 11952264Abstract: An electronic device including a substrate, a sensor, a partition wall structure, a pressurizing component, and a stopping structure is provided. The substrate has a carrying surface. The sensor is disposed on the carrying surface. The partition wall structure is disposed on the carrying surface and surrounds the sensor. The pressurizing component is disposed on the partition wall structure. The pressurizing component, the partition wall structure, and the substrate jointly form a cavity, and the pressurizing component includes a mass and a vibration membrane. The stopping structure is disposed between the pressurizing component and the partition wall structure and extends into the cavity. The stopping structure has at least one opening penetrating the stopping structure.Type: GrantFiled: December 21, 2021Date of Patent: April 9, 2024Assignee: Merry Electronics (Shenzhen) Co., Ltd.Inventors: Jia Yin Wu, Yung-Hsiang Chang, Yueh-Kang Lee
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Patent number: 11947694Abstract: A method, a computer program product, and a system for implementing a dynamic virtual database honeypot. The method includes relaying a query request received from a database client to a database and receiving, from the database, a response relating to the query request. The method also includes determining the query request is an attack on the database based on session information relating to the database and the database client, generating a honey token based on information contained within the response, generating an alternate response formatted in a same format as the response and containing artificial information that masks the information contained within the response. The method further includes inserting the honey token into the alternate response and transmitting the alternate response to the database client.Type: GrantFiled: June 29, 2021Date of Patent: April 2, 2024Assignee: International Business Machines CorporationInventors: Galia Diamant, Richard Ory Jerrell, Chun-Shuo Lin, Wei-Hsiang Hsiung, Cheng-Ta Lee, Wei-Jie Liau
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Publication number: 20240105121Abstract: An electronic device includes a substrate, a first silicon transistor, a second silicon transistor and a first oxide semiconductor transistor. The first silicon transistor, the second silicon transistor and the first oxide semiconductor transistor are disposed on the substrate. The first silicon transistor has a first terminal electrically connected to a first voltage level, a second terminal and a control terminal. The second silicon transistor has a first terminal electrically connected to the second terminal of the first silicon transistor, a second terminal electrically connected to a second voltage level, and a control terminal electrically connected to the control terminal of the first silicon transistor. The first oxide semiconductor transistor has a first terminal electrically connected to the first terminal of the second silicon transistor. Wherein, a voltage value of the first voltage level is greater than a voltage value of the second voltage level.Type: ApplicationFiled: December 6, 2023Publication date: March 28, 2024Inventors: Lien-Hsiang CHEN, Kung-Chen KUO, Ming-Chun TSENG, Cheng-Hsu CHOU, Kuan-Feng LEE
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Publication number: 20240103377Abstract: A composition and method for removing a metal-containing layer or portion of a layer of a pellicle of an EUV mask are provided. The composition includes water; one or more oxidizing agents; and one or more acids. The method includes forming one or more layers over a silicon substrate with at least one of those layers includes a metal containing layer and removing the metal containing layer by contacting the metal containing layer with the composition of the disclosed and claimed subject matter.Type: ApplicationFiled: October 15, 2020Publication date: March 28, 2024Applicant: Versum Materials US, LLCInventors: CHAO-HSIANG CHEN, CHUNG-YI CHANG, YI-CHIA LEE, WEN DAR LIU
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Patent number: 11942652Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.Type: GrantFiled: April 13, 2022Date of Patent: March 26, 2024Assignees: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chen-Ting Kao, Chi-Cheng Wen, Yu-Sheng Chang, Chih-Cheng Lee, Chiung-Hsiang Wu, Sheng-Li Yen, Yu-Cheng Zhang, Chang-Ju Hsieh, Chen Chao
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Publication number: 20240094626Abstract: A pellicle for an extreme ultraviolet (EUV) photomask includes a pellicle frame and a main membrane attached to the pellicle frame. The main membrane includes a plurality of nanotubes, and each of the plurality of nanotubes is covered by a coating layer containing Si and one or more metal elements.Type: ApplicationFiled: April 12, 2023Publication date: March 21, 2024Inventors: Pei-Cheng HSU, Wei-Hao LEE, Huan-Ling LEE, Hsin-Chang LEE, Chin-Hsiang LIN
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Patent number: 11935981Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.Type: GrantFiled: June 30, 2021Date of Patent: March 19, 2024Assignee: EPISTAR CORPORATIONInventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
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Publication number: 20240088027Abstract: An integrated circuit includes an inductor that includes a first set of conductors in at least a first metal layer, and a guard ring enclosing the inductor. The guard ring includes a first conductor extending in a first direction, a second conductor extending in a second direction, and a first set of staggered conductors coupled to a first end of the first conductor and a first end of the second conductor. The first set of staggered conductors includes a second set of conductors in a second metal layer, a third set of conductors in a third metal layer and a first set of vias coupling the second set of conductors with the third set of conductors. The third metal layer is above the second metal layer. All metal lines in the second metal layer that are part of the guard ring extend in the first direction.Type: ApplicationFiled: November 14, 2023Publication date: March 14, 2024Inventors: Chiao-Han LEE, Chi-Hsien LIN, Ho-Hsiang CHEN, Hsien-Yuan LIAO, Tzu-Jin YEH, Ying-Ta LU
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Patent number: 11925701Abstract: Provided is a method for skin conditioning comprising administering to a subject in need thereof a composition comprising a Dan Feng peony extract, where the Dan Feng peony extract is extracted from flowers of Dan Feng peony. The Dan Feng peony extract is used to increase the production of hyaluronic acid, maintain the structure of skin keratinocytes, and regulate the moisture content of skin cells.Type: GrantFiled: October 26, 2021Date of Patent: March 12, 2024Assignee: TCI CO., LTD.Inventors: Yung-Hsiang Lin, Wei-Chun Lee
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Patent number: 11906092Abstract: A quick-disconnect (QD) connector is configured for a server having electronic modules and an internal fluid circulation system for circulating fluid to cool the electronic modules. The QD connector comprises a first manifold, a second manifold, and a mating actuator. The second manifold is removably connected to the first manifold. The fluid is flowable within the internal fluid circulation system of the server in response to the first manifold and the second manifold being in a connected state. The mating actuator includes a handle and a buckle attached to the handle. The handle is movably coupled to the first manifold so as to be movable from a first position to a second position. The buckle is configured to engage the second manifold and to move the first and second manifolds into the connected state in response to the handle being moved from the first position to the second position.Type: GrantFiled: May 31, 2022Date of Patent: February 20, 2024Assignee: QUANTA COMPUTER INC.Inventors: Chao-Jung Chen, Chih-Hsiang Lee, Wei-Pin Chen, Jyue Hou