Abstract: A method and an apparatus for an integrated high definition television controller are described. The integrated high definition digital television controller includes two or more the following functions in a single chip: MPEG2 Transport, Audio and Video Decoders, Video input capture and converter, flexible video scan rate converter, de-interlace processor, display controller and video D/A converters, graphics controller, a unified local bus, N-plane alpha blending, a warping engine, audio digital signal processor, disk drive interface, peripheral bus interfaces, such as PCI bus and local bus interfaces, various I/O peripherals, a bus bridge with a partitioned chip, and a CPU with caches. The integrated controller, in one embodiment, is designed to handle multiple television standards (for example ATSC, ARIB, DVB, AES, SMPTE, ITU) and designed to be deployed in various countries in the world.

Abstract: The invention provides a method and apparatus for conversion of video data from a source format to a second destination. Conversion can be performed in real time and intermediate data is stored in a buffer. Converted video data is written into the buffer at a first rate and read out of the buffer at a second rate. In order to avoid overflow and underflow conditions, a threshold value is determined based, at least in part, on the video format being converted. The threshold value indicates a point in frame conversion at which converted data is read out of the buffer.