Abstract: A display device includes a plurality of pixels, a plurality of gate lines, a timing controller, and a gate driver. The gate lines are electrically coupled to the pixels. The timing controller provides an initial pulse signal. The gate driver is electrically coupled to the timing controller and the gate lines and receives the initial pulse signal. The gate driver receives the initial pulse signal with a high level and outputs a plurality of gate signals to the gate lines during a period which is longer than half of a frame of the display device, in response to a scan frequency of the display device changing from a first frequency to a second frequency, where the first frequency is higher than the second frequency.

Abstract: A color filter substrate and a display panel are provided. The color filter substrate includes a substrate, first spacers, second spacers, color resist patterns, and at least one dummy-color resist pattern. A first area has a first projection area A. A second area has a second projection area B. The color resist patterns are disposed at least partially around of at least one of the first spacers. A covering area of the color resist patterns in the first area is a. (a/A)*100% is defined as a first coverage rate M. The dummy-color resist pattern is disposed at least partially around of at least one of the second spacers. The covering area of the dummy-color resist pattern in the second area is b. (b/B)*100% is defined as a second coverage rate N. The first projected area A is equal to the second projected area B and 27%?(N?M)?58%.

Abstract: A color filter substrate and a display panel are provided. The color filter substrate includes a substrate, first spacers, second spacers, color resist patterns, and at least one dummy-color resist pattern. A first area has a first projection area A. A second area has a second projection area B. The color resist patterns are disposed at least partially around of at least one of the first spacers. A covering area of the color resist patterns in the first area is a. (a/A)*100% is defined as a first coverage rate M. The dummy-color resist pattern is disposed at least partially around of at least one of the second spacers. The covering area of the dummy-color resist pattern in the second area is b. (b/B)*100% is defined as a second coverage rate N. The first projected area A is equal to the second projected area B and 27% ?, (N-M)?58%.

Abstract: A signal controlling method adapted for updating a display screen of a panel is disclosed. The signal controlling method includes the following steps: updating the display screen with first image data; determining whether second image data is received; when the second image data is not received, selectively generating an internal signal, using the internal signal to enable a shift register and returning to the step of updating the display screen with the first image data; and when an initiating signal and the second image data are received, enabling a plurality of shift register units of the shift register so that a plurality of scan signal lines of the panel are sequentially enabled and updating the display screen with the second image data.

Abstract: A signal controlling method adapted for updating a display screen of a panel is disclosed. The signal controlling method includes the following steps: updating the display screen with first image data; determining whether second image data is received; when the second image data is not received, selectively generating an internal signal, using the internal signal to enable a shift register and returning to the step of updating the display screen with the first image data; and when an initiating signal and the second image data are received, enabling a plurality of shift register units of the shift register so that a plurality of scan signal lines of the panel are sequentially enabled and updating the display screen with the second image data.

Abstract: A display device includes a plurality of pixels, a plurality of gate lines, a timing controller, and a gate driver. The gate lines are electrically coupled to the pixels. The timing controller provides an initial pulse signal. The gate driver is electrically coupled to the timing controller and the gate lines and receives the initial pulse signal. The gate driver receives the initial pulse signal with a high level and outputs a plurality of gate signals to the gate lines during a period which is longer than half of a frame of the display device, in response to a scan frequency of the display device changing from a first frequency to a second frequency, where the first frequency is higher than the second frequency.

Abstract: A liquid crystal display device comprises a pixel matrix including a plurality of subpixels, wherein the voltage polarities of two horizontal adjacent subpixels are opposite to one another, and the voltage polarity of one subpixel in four serial subpixels along a diagonal direction is opposite to the voltage polarities of the other three subpixels.

Abstract: An active device array substrate includes a substrate, a pixel array, a peripheral circuit, and a number of marks. The substrate has an active area and a peripheral circuit area that is connected to the active area. The pixel array is disposed on the active area of the substrate. The peripheral circuit is disposed on the peripheral circuit area of the substrate. Besides, the peripheral circuit includes a number of driver bonding pads, a number of fan-out lines, and a number of connecting lines. The fan-out lines are electrically connected to the pixel array. Each of the connecting lines connects one of the driver bonding pads and one of the fan-out lines. Additionally, the connecting lines are arranged in different pitches. Each of the marks is disposed between two adjacent connecting lines.

Abstract: A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal. The pull-down circuit pulls a potential at the first gate and another potential at the output terminal down to a power supply potential during the pull-up circuit is disabled.

Abstract: A thin film transistor (TFT) substrate including a base, a plurality of scan lines and data lines and a pixel unit is provided. The scan lines are disposed on the base. The data lines are disposed above the scan lines and are perpendicular to the scan lines to define a plurality of pixel areas. The pixel unit is disposed on the base and inside one of the pixel areas. The pixel unit comprises a TFT and a pixel electrode. The TFT comprises a source and a drain. The pixel electrode is electrically connected to the drain. The pixel electrode comprises a first main electrode, a second main electrode and a plurality of branch electrodes. The first main electrode is perpendicular to the second main electrode. The branch electrodes are connected to the first main electrode and/or the second main electrode. The first main electrode substantially divides the pixel area evenly.

Abstract: A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal.

Abstract: The first substrate of the touch panel includes a pixel array and a plurality of sensing lines. The pixel array includes a plurality of scan lines, a plurality of data lines and a plurality of pixel electrodes. The sensing lines are parallel arranged in the pixel array, adjacent to parts of the pixel electrodes, and electrically insulated from the scan lines, the data lines and the pixel electrodes. The second substrate of the touch panel includes a plurality of conductive protrusions disposed corresponding to the sensing lines. When there is no external force applied to the touch panel, the conductive protrusions are electrically insulated from the scan lines and the pixel array. When an external force is applied to the touch panel, at least one of the conductive protrusions may contact both one of the scan lines and parts of the pixel array.

Abstract: A plurality of spacers are used to control the gap in a liquid crystal display panel. When a spacer is associated with an electrode in the lower substrate where the switching elements and data lines are disposed, it is located substantially at the center of the electrode. In a transflective LCD sub-pixel, a spacer may be disposed at the center of one of the transmissive and reflective electrodes. Alternatively, a spacer is disposed at the center of each of the transmissive and reflective electrodes. When the electrode in a sub-pixel comprises different sections to affect the alignment of the liquid crystal layer associated with the electrode, the spacer is located at the intersection of the sections, if possible, so that the spacer is located at the intersections of different domains of the liquid crystal layer.

Abstract: An active device array substrate includes a substrate, a pixel array, a peripheral circuit, and a number of marks. The substrate has an active area and a peripheral circuit area that is connected to the active area. The pixel array is disposed on the active area of the substrate. The peripheral circuit is disposed on the peripheral circuit area of the substrate. Besides, the peripheral circuit includes a number of driver bonding pads, a number of fan-out lines, and a number of connecting lines. The fan-out lines are electrically connected to the pixel array. Each of the connecting lines connects one of the driver bonding pads and one of the fan-out lines. Additionally, the connecting lines are arranged in different pitches. Each of the marks is disposed between two adjacent connecting lines.

Abstract: A thin film transistor (TFT) substrate including a base, a plurality of scan lines and data lines and a pixel unit is provided. The scan lines are disposed on the base. The data lines are disposed above the scan lines and are perpendicular to the scan lines to define a plurality of pixel areas. The pixel unit is disposed on the base and inside one of the pixel areas. The pixel unit comprises a TFT and a pixel electrode. The TFT comprises a source and a drain. The pixel electrode is electrically connected to the drain. The pixel electrode comprises a first main electrode, a second main electrode and a plurality of branch electrodes. The first main electrode is perpendicular to the second main electrode. The branch electrodes are connected to the first main electrode and/or the second main electrode. The first main electrode substantially divides the pixel area evenly.

Abstract: A color filter and a manufacturing method thereof are provided. In the method of the invention, a substrate having a display area and a non-display area is provided. Thereafter, a black matrix is formed over the substrate, wherein black matrix defines the display area into a plurality of sub-pixel areas, and covers the non-display area, which forms an edge of the display area. Then, a color filter unit is formed in each sub-pixel area, and a light shielding layer is formed over the black matrix simultaneously. Accordingly, the shielding layer of the color filter provided by the present invention is capable of effectively reducing the light leakage from the edge of the display area.

Abstract: A thin film transistor (TFT) substrate including a base, a plurality of scan lines and data lines and a pixel unit is provided. The scan lines are disposed on the base. The data lines are disposed above the scan lines and are perpendicular to the scan lines to define a plurality of pixel areas. The pixel unit is disposed on the base and inside one of the pixel areas. The pixel unit comprises a TFT and a pixel electrode. The TFT comprises a source and a drain. The pixel electrode is electrically connected to the drain. The pixel electrode comprises a first main electrode, a second main electrode and a plurality of branch electrodes. The first main electrode is perpendicular to the second main electrode. The branch electrodes are connected to the first main electrode and/or the second main electrode. The first main electrode substantially divides the pixel area evenly.

Abstract: A liquid crystal display device comprises a pixel matrix including a plurality of subpixels, wherein the voltage polarities of two horizontal adjacent subpixels are opposite to one another, and the voltage polarity of one subpixel in four serial subpixels along a diagonal direction is opposite to the voltage polarities of the other three subpixels.

Abstract: A color filter and a manufacturing method thereof are provided. In the method of the invention, a substrate having a display area and a non-display area is provided. Thereafter, a black matrix is formed over the substrate, wherein black matrix defines the display area into a plurality of sub-pixel areas, and covers the non-display area, which forms an edge of the display area. Then, a color filter unit is formed in each sub-pixel area, and a light shielding layer is formed over the black matrix simultaneously. Accordingly, the shielding layer of the color filter provided by the present invention is capable of effectively reducing the light leakage from the edge of the display area.

Abstract: A color filter and a manufacturing method thereof are provided. In the method of the invention, a substrate having a display area and a non-display area is provided. Thereafter, a black matrix is formed over the substrate, wherein black matrix defines the display area into a plurality of sub-pixel areas, and covers the non-display area, which forms an edge of the display area. Then, a color filter unit is formed in each sub-pixel area, and a light shielding layer is formed over the black matrix simultaneously. Accordingly, the shielding layer of the color filter provided by the present invention is capable of effectively reducing the light leakage from the edge of the display area.