Patents by Inventor Hsiang Wei Wang

Hsiang Wei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Top via pattern for bond pad structure
    Patent number: 7323784
    Abstract: Top via pattern for a bond pad structure has at least one first via group and at least one second via group adjacent to each other. The first via group has at least two line vias extending in a first direction. The second via group has at least two line vias extending in a second direction different from said first direction. The line via of the first via group does not cross the line via of the second via group.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: January 29, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ho-Yin Yiu, Fu-Jier Fan, Yu-Jui Wu, Aaron Wang, Hsiang-Wei Wang, Huang-Sheng Lin, Ming-Hsien Chen, Ruey-Yun Shiue
  • Top via pattern for bond pad structure
    Publication number: 20060208360
    Abstract: Top via pattern for a bond pad structure has at least one first via group and at least one second via group adjacent to each other. The first via group has at least two line vias extending in a first direction. The second via group has at least two line vias extending in a second direction different from said first direction. The line via of the first via group does not cross the line via of the second via group.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 21, 2006
    Inventors: Ho-Yin Yiu, Fu-Jier Fan, Yu-Jui Wu, Aaron Wang, Hsiang-Wei Wang, Huang-Sheng Lin, Ming-Hsien Chen, Ruey-Yun Shiue
  • Method for combining via patterns into a single mask
    Patent number: 7087350
    Abstract: In a damascene process of fabricating an interconnect structure in an integrated circuit, a method for removing separate via layers is disclosed herein, which includes combining the via layers into a single mask.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: August 8, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventor: Hsiang Wei Wang
  • Secateurs
    Patent number: D1050832
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: November 12, 2024
    Assignee: AquaCraft Industry Co., Ltd
    Inventors: Kuei-Fang Chang, Hsiang-Wei Wang