Patents by Inventor Hsiang-Wen Chen

Hsiang-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10983812
    Abstract: Provided are a computer program product, system, and method for replaying interactions with a graphical user interface (GUI) presented in a video stream of the GUI. Interaction with a rendered graphical user interface (GUI) to control an application is recorded to generate a video stream. In response to activation of a graphical element in the rendered GUI, an event action is rendered indicating a display region in which the graphical element was activated and a section of the video stream in which the activation of the graphical element occurred. The video stream is rendered. Selection is detected of a display region of the rendered video stream comprising the display region in the event action. The section of the video stream indicated in the event action is rendered in response to the selection of the display region indicated in the event action.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 20, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hsiao-Yung Chen, Wen-Ping Chi, Hsin-Yu Hsieh, Wendy P. W. Wang, Hsiang-Wen Chen
  • Patent number: 10932173
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points is collected by a computing device. The set of beacon frame transmission data includes first and second subsets including frame rates for access points and network capability data including security data for access points. The computing device compares factors derived utilizing the frame rates. The computing device weights the beacon frame transmission data with respect to the network capability data for the access points, wherein the weighting indicates security data has a heavier weight than network signal strength. The computing device computes, using the first and second factors and the weighting, a set of expected network quality scores. The computing device determines, using the set of expected network quality scores, to establish the connection utilizing the first access point. The computing device establishes the connection utilizing the first access point.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: February 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Publication number: 20200159549
    Abstract: Provided are a computer program product, system, and method for replaying interactions with a graphical user interface (GUI) presented in a video stream of the GUI. Interaction with a rendered graphical user interface (GUI) to control an application is recorded to generate a video stream. In response to activation of a graphical element in the rendered GUI, an event action is rendered indicating a display region in which the graphical element was activated and a section of the video stream in which the activation of the graphical element occurred. The video stream is rendered. Selection is detected of a display region of the rendered video stream comprising the display region in the event action. The section of the video stream indicated in the event action is rendered in response to the selection of the display region indicated in the event action.
    Type: Application
    Filed: November 19, 2018
    Publication date: May 21, 2020
    Inventors: Hsiao-Yung Chen, Wen-Ping Chi, Hsin-Yu Hsieh, Wendy P.W. Wang, Hsiang-Wen Chen
  • Publication number: 20190320371
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points is collected by a computing device. The set of beacon frame transmission data includes first and second subsets including frame rates for access points and network capability data including security data for access points. The computing device compares factors derived utilizing the frame rates. The computing device weights the beacon frame transmission data with respect to the network capability data for the access points, wherein the weighting indicates security data has a heavier weight than network signal strength. The computing device computes, using the first and second factors and the weighting, a set of expected network quality scores. The computing device determines, using the set of expected network quality scores, to establish the connection utilizing the first access point. The computing device establishes the connection utilizing the first access point.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 17, 2019
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Patent number: 10397844
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points may be collected by a computing device. The beacon frame transmission data may include first and second subsets indicating respective frame success rates. The computing device may compare factors derived utilizing the respective frame success rates. The computing device may evaluate network capability data for the access points. The computing device may weight the beacon frame transmission data with respect to information indicating network security and encryption level have heavier weights than other factors, and identify that the first access point achieves an encryption level threshold. The computing device may use the beacon frame transmission data for the set of access points to determine to establish a connection utilizing the first access point. The computing device may establish the connection utilizing the first access point.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: August 27, 2019
    Assignee: International Business Machines Corporation
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Patent number: 10360289
    Abstract: Disclosed aspects relate to encoded text data management using a set of encoded text data types. A first set of bits which indicates a first encoded text data type may be identified. A second set of bits which indicates a first quantitative size of a third set of bits for a first set of text data of the first encoded text data type may be identified. Using both the first set of bits and the second set of bits, an encoded data management operation may be executed with respect to the third set of bits for the first set of text data of the first encoded text data type.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: July 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Wendy Ping Wen Wang, Hsiao-Yung Chen, Hsiang-Wen Chen, Wen-Ping Chi, Hsin Yu Hsieh
  • Publication number: 20180322102
    Abstract: Disclosed aspects relate to encoded text data management using a set of encoded text data types. A first set of bits which indicates a first encoded text data type may be identified. A second set of bits which indicates a first quantitative size of a third set of bits for a first set of text data of the first encoded text data type may be identified. Using both the first set of bits and the second set of bits, an encoded data management operation may be executed with respect to the third set of bits for the first set of text data of the first encoded text data type.
    Type: Application
    Filed: April 13, 2018
    Publication date: November 8, 2018
    Inventors: Wendy Ping Wen Wang, Hsiao-Yung Chen, Hsiang-Wen Chen, Wen-Ping Chi, Hsin Yu Hsieh
  • Patent number: 10037309
    Abstract: Disclosed aspects relate to encoded text data management using a set of encoded text data types. A first set of bits which indicates a first encoded text data type may be identified. A second set of bits which indicates a first quantitative size of a third set of bits for a first set of text data of the first encoded text data type may be identified. Using both the first set of bits and the second set of bits, an encoded data management operation may be executed with respect to the third set of bits for the first set of text data of the first encoded text data type.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: July 31, 2018
    Assignee: International Business Machines Corporation
    Inventors: Wendy Ping Wen Wang, Hsiao-Yung Chen, Hsiang-Wen Chen, Wen-Ping Chi, Hsin Yu Hsieh
  • Patent number: 10028192
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points may be collected by a computing device. The computing device may use the set of beacon frame transmission data for the set of access points to determine to establish a connection utilizing a first access point of the set of access points. The computing device may establish the connection utilizing the first access point.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: July 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Publication number: 20180152873
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points may be collected by a computing device. The computing device may use the set of beacon frame transmission data for the set of access points to determine to establish a connection utilizing a first access point of the set of access points. The computing device may establish the connection utilizing the first access point.
    Type: Application
    Filed: February 19, 2018
    Publication date: May 31, 2018
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Publication number: 20180146019
    Abstract: A method of providing high resolution video content with reduced latency, including, determining available bandwidth of a communication path, and sending delta-value video content segments to a client device if the available bandwidth is above a first threshold value.
    Type: Application
    Filed: November 21, 2016
    Publication date: May 24, 2018
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Publication number: 20180115934
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points may be collected by a computing device. The beacon frame transmission data may include first and second subsets indicating respective frame success rates. The computing device may compare factors derived utilizing the respective frame success rates. The computing device may evaluate network capability data for the access points. The computing device may weight the beacon frame transmission data with respect to information indicating network security and encryption level have heavier weights than other factors, and identify that the first access point achieves an encryption level threshold. The computing device may use the beacon frame transmission data for the set of access points to determine to establish a connection utilizing the first access point. The computing device may establish the connection utilizing the first access point.
    Type: Application
    Filed: December 13, 2017
    Publication date: April 26, 2018
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Patent number: 9894580
    Abstract: Disclosed aspects relate to access point selection. A set of beacon frame transmission data for a set of access points may be collected by a computing device. The computing device may use the set of beacon frame transmission data for the set of access points to determine to establish a connection utilizing a first access point of the set of access points. The computing device may establish the connection utilizing the first access point.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hsiang-Wen Chen, Hsiao-Yung Chen, Wen-Ping Chi, Hsin Yu Hsieh, Wendy Ping Wen Wang
  • Patent number: 5895961
    Abstract: A CMOS integrated circuit structure with planarized self-aligned transistors and local planarization in the vicinity of the transistors so as to allow an interconnect, with a planar upper surface, which is free of bridging, has good continuity over the planarized topography and is compatible with self-alignment schemes, hence conserving chip real estate. The structure is compatible with planarization using BPSG, BPTEOS, SOG or CMP. After formation of self-aligned insulated transistor gates and active transistor regions, a "landing pad" is formed on the substrate at the buried contact and polyiso contact locations so as to allow more effective etching at the exact location of the buried contact and polyiso contact. Then the integrated circuit structure is locally planarized by formation of an oxide layer and a reflowed overlying glass layer. The glass layer is etched back to planarize the surface.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: April 20, 1999
    Assignee: Paradigm Technology, Inc.
    Inventor: Hsiang-Wen Chen
  • Patent number: 5656861
    Abstract: An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: August 12, 1997
    Assignee: Paradigm Technology, Inc.
    Inventors: Norman Godinho, Tsu-Wei Frank Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-Man Baik, Ting-Pwu Yen
  • Patent number: 5620919
    Abstract: An MOS transistor for use in an integrated circuit, particularly CMOS integrated circuits, is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of titanium silicide encapulated by a thin film of titanium nitride.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: April 15, 1997
    Assignee: Paradigm Technology, Inc.
    Inventors: Norman Godinho, Frank T.W. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-man Baik, Ting-Pwu Yen
  • Patent number: 5483104
    Abstract: An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: January 9, 1996
    Assignee: Paradigm Technology, Inc.
    Inventors: Norman Godinho, Tsu-Wei F. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-Man Baik, Ting-Pwu Yen
  • Patent number: 5172211
    Abstract: A load resistor for use in a semiconductor integrated circuit consists of two portions of conductive material, typically strips of either a silicide or a composite polycrystalline silicon layer and silicide layer formed thereon, formed on a semiconductor substrate and separated from each other by a selected distance. An electrically conductive dopant diffusion barrier is formed on the first and second portions of conductive material. A polycrystalline silicon material is then placed on the structure such that one portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the first portion of conductive material and the other portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the second portion of conductive material. Typically the polycrystalline silicon material is placed on an insulation layer formed on the semiconductor substrate in the portion of the substrate between the two portions of conductive material.
    Type: Grant
    Filed: January 12, 1990
    Date of Patent: December 15, 1992
    Assignee: Paradigm Technology, Inc.
    Inventors: Norman Godinho, Frank T. W. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-man Balk, Ting-Pwu Yen
  • Patent number: 5168076
    Abstract: A load resistor for use in a semiconductor integrated circuit consists of two portions of conductive material, typically strips of either a silicide or a composite polycrystalline silicon layer and silicide layer formed thereon, formed on a semiconductor substrate and separated from each other by a selected distance. An electrically conductive dopant diffusion barrier is formed on the first and second portions of conductive material. A polycrystalline silicon material is then placed on the structure such that one portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the first portion of conductive material and the other portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the second portion of conductive material. Typically the polycrystalline silicon material is placed on an insulation layer formed on the semiconductor substrate in the portion of the substrate between the two portions of conductive material.
    Type: Grant
    Filed: July 1, 1991
    Date of Patent: December 1, 1992
    Assignee: Paradigm Technology, Inc.
    Inventors: Norman Godinho, Frank T. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-man Baik, Ting-Pwu Yen
  • Patent number: 5166771
    Abstract: An MOS transistor for use in an integrated circuit, particularly CMOS integrated circuits, is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from short circuiting to the gate by oxide insulation between source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of titanium silicide encapsulated by a thin film of titanium nitride.
    Type: Grant
    Filed: January 12, 1990
    Date of Patent: November 24, 1992
    Assignee: Paradigm Technology, Inc.
    Inventors: Norman Godinho, Frank T. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-man Baik, Ting-Pwu Yen