Patents by Inventor HSIANG-YI CHENG

HSIANG-YI CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11909709
    Abstract: The present invention relates to a networked device configuration identifying method.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: February 20, 2024
    Assignee: FLYTECH TECHNOLOGY CO., LTD.
    Inventor: Hsiang-Yi Cheng
  • Publication number: 20220085188
    Abstract: The present invention discloses a stacked semiconductor chip structure and its process wherein the stacked semiconductor chip structure comprises a substrate as well as P-type semiconductor layers and N-type semiconductor layers which are stacked one by one on the substrate, wherein the P-type semiconductor layers and the N-type semiconductor layers are arranged alternately, there are at least two P-type semiconductor layers and at least two N-type semiconductor layers. The present invention uses the chemical vapor deposition method to stack and form the P-type semiconductor layers and the N-type semiconductor layers, uses the physical etching and the plasma cleaning to form the conducting layers and thus avoids using the photo masks, the photo resist and the mask aligners for the manufacture of semiconductor chips, reduces the complexity of semiconductor chip processes and increases the yield of semiconductor chip products.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 17, 2022
    Inventors: Bo TU, Hsiang-Yi CHENG
  • Patent number: 10665563
    Abstract: A semiconductor chip packaging structure without soldering wire and a packaging method thereof are disclosed. The semiconductor chip packaging structure comprises at least one packaging structure, and each packaging structure comprises a substrate, and a semiconductor chip is arranged on the substrate. Pins of the semiconductor chip are electrically connected to the conductive circuit formed by engraving or etching metal film or alloy film. The semiconductor chip packaging structure also comprises a packaging glue layer covering the semiconductor chip and the conductive circuit. The semiconductor chip packaging method includes steps of arranging a semiconductor chip on the substrate; forming a metal film or an alloy film around the semiconductor chip; etching the metal film or alloy film, to form the conductive circuit; and covering a packaging glue layer on the semiconductor chip and the conductive circuit. As a result, the production efficiency can be improved greatly.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: May 26, 2020
    Assignee: SHENZHEN JIEJIANDA INNOVATION TECHNOLOGY CO., LTD.
    Inventors: Bo Tu, Hsiang-Yi Cheng
  • Publication number: 20200105736
    Abstract: The invention discloses a three-dimensional stacked encapsulated LED display screen module and its encapsulation method thereof. The LED display screen module comprises a transparent screen substrate on the surface of the display screen, wherein a red LED layer, a green LED layer, a blue LED layer and an LED light emitting control device layer positioned on them are sequentially stacked in any order on the transparent screen substrate. The translucent screen substrate, the red light LED layer, the green light LED layer, the blue light LED layer and the LED light emitting control device layer are fixedly connected through shadowless adhesive layers. Conductive circuits formed by carving or etching metal films or alloy films are laid on various layers, and LEDs are arranged on different layers in a staggered manner.
    Type: Application
    Filed: September 23, 2019
    Publication date: April 2, 2020
    Inventors: Bo TU, Hsiang-Yi CHENG
  • Publication number: 20200091106
    Abstract: A semiconductor chip packaging structure without soldering wire and a packaging method thereof are disclosed. The semiconductor chip packaging structure comprises at least one packaging structure, and each packaging structure comprises a substrate, and a semiconductor chip is arranged on the substrate. Pins of the semiconductor chip are electrically connected to the conductive circuit formed by engraving or etching metal film or alloy film. The semiconductor chip packaging structure also comprises a packaging glue layer covering the semiconductor chip and the conductive circuit. The semiconductor chip packaging method includes steps of arranging a semiconductor chip on the substrate; forming a metal film or an alloy film around the semiconductor chip; etching the metal film or alloy film, to form the conductive circuit; and covering a packaging glue layer on the semiconductor chip and the conductive circuit. As a result, the production efficiency can be improved greatly.
    Type: Application
    Filed: September 18, 2018
    Publication date: March 19, 2020
    Inventors: BO TU, HSIANG-YI CHENG
  • Publication number: 20150241002
    Abstract: A production process of a strong light LED light source module, including the following steps: Step a: prepare an integral LED chip, and on a non-electrode surface having a large size in the LED chip, coat a film having a high refractive index; Step b: cut the LED chip coated with the film having a high refractive index into individual LED chips as required; Step c: fix the individual LED chips on the surface of a substrate, wherein a surface coated with the film having a high refractive index is in contact with the substrate and the individual LED chips are connected through welding wires; Step d: coat a film having a high refractive index on five remaining surfaces of the individual LED chips; Step e: assemble or encapsulate a compete LED light source module as required.
    Type: Application
    Filed: May 8, 2014
    Publication date: August 27, 2015
    Applicant: Dongguan Meisheng Electrical Products, Co., Ltd.
    Inventor: HSIANG-YI CHENG