Patents by Inventor Hsiang-Yu Chou

Hsiang-Yu Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134538
    Abstract: A memory operation method, comprising: when a first super block of a memory device is a open block (or in programming state), obtaining a first read count of one of a plurality of first memory blocks in the first super block, wherein the first read count is a number of times that data of one of the first memory blocks is read out; determining whether the first read count is larger than a first threshold; and when the first read count is larger than the first threshold, moving a part of the data in the first super block to a safe area in the memory device, wherein the part of the data comprises data in the first memory block.
    Type: Application
    Filed: June 5, 2023
    Publication date: April 25, 2024
    Inventors: Po-Sheng CHOU, Hsiang-Yu HUANG, Yan-Wen WANG
  • Patent number: 9607833
    Abstract: The method includes performing a photolithography process which includes using a photomask to pattern a radiation beam. The photolithography process also includes exposing a target substrate to the patterned radiation beam. During the exposing of the target surface, there is a real-time monitoring for particles incident or approximate the photomask.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: March 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Chieh Chien, Shu-Hao Chang, Hsiang-Yu Chou, Kuo-Chang Kau, Shun-Der Wu, Chia-Chen Chen, Jeng-Horng Chen
  • Publication number: 20160225610
    Abstract: The method includes performing a photolithography process which includes using a photomask to pattern a radiation beam. The photolithography process also includes exposing a target substrate to the patterned radiation beam. During the exposing of the target surface, there is a real-time monitoring for particles incident or approximate the photomask.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: Shang-Chieh Chien, Shu-Hao Chang, Hsiang-Yu Chou, Kuo-Chang Kau, Shun-Der Wu, Chia-Chen Chen, Jeng-Horng Chen
  • Patent number: 9140987
    Abstract: A method of reducing resist outgassing for EUV lithography is disclosed. The method includes forming a material layer over a substrate wherein a top surface of the material layer contains a certain concentration of a quencher or a base. The method further includes forming a resist layer over the top surface of the material layer and exposing the resist layer to a EUV radiation for patterning. The quencher or the base underneath the resist layer acts to suppress resist outgassing during the EUV exposure. The material layer itself may serve as a hard mask layer or an anti-reflection layer for the patterning process, in addition to being the carrier of the quencher or the base. The method can be used in other types of lithography, such as e-beam lithography, for reducing resist outgassing.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: September 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Chieh Chien, Shu-Hao Chang, Hsiang-Yu Chou, Ming-Chin Chien, Jui-Ching Wu, Jeng-Horng Chen
  • Publication number: 20150241776
    Abstract: A method of reducing resist outgassing for EUV lithography is disclosed. The method includes forming a material layer over a substrate wherein a top surface of the material layer contains a certain concentration of a quencher or a base. The method further includes forming a resist layer over the top surface of the material layer and exposing the resist layer to a EUV radiation for patterning. The quencher or the base underneath the resist layer acts to suppress resist outgassing during the EUV exposure. The material layer itself may serve as a hard mask layer or an anti-reflection layer for the patterning process, in addition to being the carrier of the quencher or the base. The method can be used in other types of lithography, such as e-beam lithography, for reducing resist outgassing.
    Type: Application
    Filed: February 21, 2014
    Publication date: August 27, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Chieh Chien, Shu-Hao Chang, Hsiang-Yu Chou, Ming-Chin Chien, Jui-Ching Wu, Jeng-Horng Chen