Abstract: A method of manufacturing vertical transistors includes steps of: forming a conductive layer on the surface of a substrate with a ditch and two support portions; removing the conductive layer on the bottom wall of the ditch and top walls of the support portions via anisotropic etching through a etch back process; forming an oxidized portion in the ditch; and etching the conductive layer to form two gates without contacting each other. By forming the conductive layer on the surface of the ditch and adopting selective etching of the etch back process, the problem of forming sub-trenches caused by lateral etching or uneven etching rate that might otherwise occur in the conventional etching process is prevented, and the risk of damaging metal wires caused by increasing etching duration also can be averted.

Abstract: A method of manufacturing metal gates comprises the steps of: forming a plurality of parallel trenches on a substrate; forming sequentially a conductive layer and a protective layer on the surfaces of the substrate and trenches; removing the protective layer and conductive layer on the surface of the substrate and the protective layer on the bottom walls of the trenches through anisotropic etching to retain only the protective layer and conductive layer on the side walls; and finally removing the conductive layer not covered by the protective layer through isotropic etching to retain only the protective layer and conductive layer on the side walls so that two insulating gates are respectively formed on the side walls. Thus no isolation material is needed to be disposed at the bottom of the trenches, and the problem of excessive etching to the trenches that results in undesirable insulation can be averted.

Abstract: A method of manufacturing vertical transistors includes steps of: forming a conductive layer on the surface of a substrate with a ditch and two support portions; removing the conductive layer on the bottom wall of the ditch and top walls of the support portions via anisotropic etching through a etch back process; forming an oxidized portion in the ditch; and etching the conductive layer to form two gates without contacting each other. By forming the conductive layer on the surface of the ditch and adopting selective etching of the etch back process, the problem of forming sub-trenches caused by lateral etching or uneven etching rate that might otherwise occur in the conventional etching process is prevented, and the risk of damaging metal wires caused by increasing etching duration also can be averted.