Patents by Inventor Hsiao-Chu Lin

Hsiao-Chu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250122367
    Abstract: A polymer composite for preparing a low dielectric resin composition having a dielectric loss tangent (Df) that is less than or equal to 0.00200 is provided. The polymer composite includes a first styrene-based copolymer having a weight average molecular weight that is lower than 20,000 g/mol and a second styrene-based copolymer having a weight average molecular weight that is higher than 20,000 g/mol, wherein the weight ratio of the first styrene-based copolymer to the second styrene-based copolymer is from 5/95 to 95/5.
    Type: Application
    Filed: October 10, 2024
    Publication date: April 17, 2025
    Inventors: Chi-Jui HSIEH, Tz-Jie JU, Yi-Hsuan TANG, Chiung Chi LIN, Hung Lin CHEN, Chi Yi LIU, Hsiao-Chu LIN, Ka Chun AU-YEUNG, Wei-Liang LEE, Yu-Chen HSU, Ming-Hung LIAO, Chien-Han CHEN, Yu-Tien CHEN, Yu-Pin LIN, Gang-Lun FAN
  • Publication number: 20220348717
    Abstract: A polyimide is provided, which contains at least one repeating unit selected from a group consisting of the following general formulas, M, N, and O: X is a residue derived from TCA represented by formula I. Y1 is a residue derived from a diamine with a cardo structure. Y2 is a residue derived from a diamine with the structure of a benzene ring, biphenyl, phenylbenzimidazole or phenylbenzoxazole. Y3 is a residue derived from a diamine with an ether or an ester group.
    Type: Application
    Filed: August 3, 2021
    Publication date: November 3, 2022
    Inventors: Chuan-Jen FU, Shih-Wei LEE, Hsiao-Chu LIN, Shu-Mei YANG, Shih-Hung HUANG, Tzu-Yuan SHIH
  • Patent number: 8081056
    Abstract: A spiral inductor is provided. The spiral inductor includes a first spiral conductive trace with at least one turn, a second spiral conductive trace, and a connector. The first spiral conductive trace comprises an outer end and an inner end. The second spiral conductive trace surrounds a portion of the outermost turn of the first spiral conductive trace, and comprises a first end and a second end. The connector electrically connects to the inner end and the first end.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: December 20, 2011
    Assignee: Via Technologies, Inc.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Patent number: 7705704
    Abstract: An inductor structure disposed over a substrate and including a coil layer is provided. The coil layer has a plurality of coil turns electrically connected with each other. An innermost coil turn of the coil layer has a portion with a narrower width in a region with a higher magnetic flux density than that in the other region with lower magnetic flux density.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: April 27, 2010
    Assignee: Via Technologies, Inc.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Patent number: 7663463
    Abstract: An inductor structure including a coil layer and at least a gain lead is disclosed. The coil layer is disposed over a substrate and has a plurality of coil turns, wherein one of the coil turns is grounded. The gain lead is disposed under at least one of the inner side and the outer side of the grounded coil turn and is electrically connected in parallel to the grounded coil turn. The width of the gain lead is less than the width of the grounded coil turn.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: February 16, 2010
    Assignee: VIA Technologies, Inc.
    Inventors: Hsiao-Chu Lin, Sheng-Yuan Lee
  • Publication number: 20090167476
    Abstract: An inductor structure disposed over a substrate and including a coil layer is provided. The coil layer has a plurality of coil turns electrically connected with each other. An innermost coil turn of the coil layer has a portion with a narrower width in a region with a higher magnetic flux density than that in the other region with lower magnetic flux density.
    Type: Application
    Filed: March 19, 2008
    Publication date: July 2, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Publication number: 20090115562
    Abstract: A spiral inductor is provided. The spiral inductor includes a first spiral conductive trace with at least one turn, a second spiral conductive trace, and a connector. The first spiral conductive trace comprises an outer end and an inner end. The second spiral conductive trace surrounds a portion of the outermost turn of the first spiral conductive trace, and comprises a first end and a second end. The connector electrically connects to the inner end and the first end.
    Type: Application
    Filed: February 1, 2008
    Publication date: May 7, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Patent number: 7504923
    Abstract: An inductor structure disposed over a substrate and comprising a first spiral wire and a second spiral wire is provided. The first spiral wire has a first end and a second end. The first end rotates in a spiral way outward from an inner portion of the first spiral wire. The second spiral wire and the first spiral wire are intertwisted with each other and symmetrically disposed about a symmetry plane. The second spiral wire has a third end and a fourth end. The third end rotates in a spiral way outward from an inner portion of the second spiral wire and is connected to the first end of the first spiral wire, so as to form a coil layer having a plurality of coil turns.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: March 17, 2009
    Assignee: Via Technologies, Inc.
    Inventors: Hsiao-Chu Lin, Sheng-Yuan Lee
  • Publication number: 20090045903
    Abstract: An inductor structure including a coil layer and at least a gain lead is disclosed. The coil layer is disposed over a substrate and has a plurality of coil turns, wherein one of the coil turns is grounded. The gain lead is disposed under at least one of the inner side and the outer side of the grounded coil turn and is electrically connected in parallel to the grounded coil turn. The width of the gain lead is less than the width of the grounded coil turn.
    Type: Application
    Filed: November 7, 2007
    Publication date: February 19, 2009
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Hsiao-Chu Lin, Sheng-Yuan Lee
  • Patent number: 7477125
    Abstract: A symmetrical inductor device arranged on a substrate is provided. The inductor device comprises first and second winding portions symmetrically arranged on an insulating layer on the substrate, in which each winding portion comprises first and second semi-circular conductive traces concentrically arranged from the outside to the inside, and each semi-circular conductive trace has a first end and a second end. Upper and lower cross-connections are crossly and respectively connected to the corresponding second ends of the first and second semi-circular conductive traces. First and second interconnections are respectively disposed in the insulating layer under the semi-circular conductive traces connected to both ends of the upper cross-connection, in which each interconnection comprises at least one conductive layer and a plurality of conductive plugs electrically connected between the conductive layer and the corresponding semi-circular conductive trace.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: January 13, 2009
    Assignee: Via Technologies, Inc.
    Inventors: Hsiao-Chu Lin, Sheng-Yuan Lee
  • Patent number: 7420452
    Abstract: An inductor structure disposed over a substrate includes a first spiral coil, a second spiral coil and at least a gain pattern. The first spiral coil includes first conducting wires and first connection leads, wherein each first connection lead connects two adjacent first conducting wires. The second spiral coil includes second conducting wires and second connection leads, wherein each second connection lead connects two adjacent second conducting wires. The second spiral coil and the first spiral coil are symmetrically disposed about a plane of symmetry and in series connection to form a spiral coil structure with 2N turns, wherein N is a positive integral, and are spaced from the substrate by different heights to form 2N?1 interlaced zones. The gain pattern is disposed under the first connection lead at the (2N?1)th interlaced zone counted from the most-outer turn up and electrically connected to the corresponding first connection lead.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: September 2, 2008
    Assignee: VIA Technologies, Inc.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Patent number: 7405483
    Abstract: A circuit board assembled with an electronic package having a first and a second inner leads is provided. The first inner lead has a first and a second ends. The circuit board includes an insulating layer, a first pad, a second pad, an extension portion, a conductive via, and a ground layer. The first and the second pads are disposed on the insulating layer. The first end of the first inner lead is electrically connected to the second pad. The extension portion disposed on the insulating layer is electrically connected to the first pad and extends to the position under the second end of the first inner lead. The conductive via passing through the insulating layer is electrically connected to the extension portion and under the second end of the first inner lead. The ground layer disposed on the insulating layer is electrically connected to the conductive via.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: July 29, 2008
    Assignee: VIA Technologies, Inc.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Publication number: 20080111220
    Abstract: A circuit board assembled with an electronic package having a first and a second inner leads is provided. The first inner lead has a first and a second ends. The circuit board includes an insulating layer, a first pad, a second pad, an extension portion, a conductive via, and a ground layer. The first and the second pads are disposed on the insulating layer. The first end of the first inner lead is electrically connected to the second pad. The extension portion disposed on the insulating layer is electrically connected to the first pad and extends to the position under the second end of the first inner lead. The conductive via passing through the insulating layer is electrically connected to the extension portion and under the second end of the first inner lead. The ground layer disposed on the insulating layer is electrically connected to the conductive via.
    Type: Application
    Filed: January 18, 2007
    Publication date: May 15, 2008
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Sheng-Yuan Lee, Hsiao-Chu Lin
  • Publication number: 20080006950
    Abstract: A pad structure for an electronic device is disclosed. The pad structure comprises an insulating layer, an uppermost metal layer and a metal layer. The insulating layer is disposed on a substrate. The uppermost metal layer is disposed on the insulating layer. The metal layer is disposed in the insulating layer under the uppermost metal layer and electrically connected to the uppermost metal layer by at least one conductive plug through the insulating layer. The metal layer has the same profile, but is smaller than, the uppermost metal layer.
    Type: Application
    Filed: December 14, 2006
    Publication date: January 10, 2008
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Hsiao-Chu Lin, Sheng-Yuan Lee