Patents by Inventor Hsiao-Lin Hsu

Hsiao-Lin Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210177246
    Abstract: An endoscope stereo imaging device includes an endoscope lens assembly and an imaging module. The imaging module includes first, second and third lens assemblies, a beam splitter, first and second image sensors and a micro lens array. A light beam from the endoscope lens assembly is transmitted to the beam splitter after passing through the first lens assembly and is split into first and second portions of the light beam. The first portion light beam is transmitted to the first image sensor via the second lens assembly and forms a two-dimensional image. The second portion light beam is transmitted to the second image sensor via the third lens assembly and the micro lens array sequentially and forms a first three-dimensional image.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 17, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Chy-Lin Wang, Yen-Chang Wang, Chih-Cheng Hsu, Hsiao-Yue Tsao
  • Patent number: 10600692
    Abstract: A semiconductor device includes a substrate having a fin structure extending along a first direction. The fin structure protrudes from a top surface of a trench isolation region and has a first height. A plurality of gate lines including a first gate line and a second gate line extend along a second direction and striding across the fin structure. The first gate line has a discontinuity directly above a gate cut region. The second gate line is disposed in proximity to a dummy fin region, and does not overlap with the dummy fin region. The fin structure has a second height within the dummy fin region, and the second height is smaller than the first height.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: March 24, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou
  • Publication number: 20200013724
    Abstract: A method of forming an overlay mark structure includes the following steps. An insulation layer is formed on a substrate. A first overlay mark is formed in the insulation layer. A metal layer is formed on the substrate. The metal layer covers the insulation layer and the first overlay mark. The metal layer on the first overlay mark is removed. A top surface of the first overlay mark is lower than a top surface of the insulation layer after the step of removing the metal layer on the first overlay mark. A second overlay mark is formed on the metal layer. In the method of forming the overlay mark structure, the first overlay mark may not be covered by the metal layer for avoiding influences on related measurements, and the second overlay mark may be formed on the metal layer for avoiding related defects generated by the height difference.
    Type: Application
    Filed: July 31, 2018
    Publication date: January 9, 2020
    Inventors: Zheng-Feng Chen, Sho-Shen Lee, En-Chiuan Liou, Hsiao-Lin Hsu, Yi-Ting Chen, Lu-Wei Kuo
  • Patent number: 10529667
    Abstract: A method of forming an overlay mark structure includes the following steps. An insulation layer is formed on a substrate. A first overlay mark is formed in the insulation layer. A metal layer is formed on the substrate. The metal layer covers the insulation layer and the first overlay mark. The metal layer on the first overlay mark is removed. A top surface of the first overlay mark is lower than a top surface of the insulation layer after the step of removing the metal layer on the first overlay mark. A second overlay mark is formed on the metal layer. In the method of forming the overlay mark structure, the first overlay mark may not be covered by the metal layer for avoiding influences on related measurements, and the second overlay mark may be formed on the metal layer for avoiding related defects generated by the height difference.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: January 7, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Zheng-Feng Chen, Sho-Shen Lee, En-Chiuan Liou, Hsiao-Lin Hsu, Yi-Ting Chen, Lu-Wei Kuo
  • Patent number: 10395999
    Abstract: A method for monitoring fin removal includes providing a substrate having a first region with first fins extending along a first direction and a second region with second fins extending along a second direction, wherein the first direction is perpendicular to the second direction; forming a material layer on the substrate to cover the first fins and the second fins; identically patterning the first fins and the second fins using a first pattern and a second pattern respectively for simultaneously removing parts of the first and second fins, thereby forming first fin features in the first region and second fin features in the second region, wherein the first pattern has a first dimension along the second direction, the second pattern has a second dimension along the second direction, and the second dimension is equal to the first dimension; and monitoring the first fin features using the second fin features.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: August 27, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hao Yang, En-Chiuan Liou, Hsiao-Lin Hsu, Tang-Chun Weng, Chia-Ching Lin, Yen-Pu Chen
  • Patent number: 10373915
    Abstract: A measurement make includes four rectangular regions having a first region and a second region arranged diagonally, and a third region and a fourth region arranged diagonally. A plurality sets of first inner pattern blocks, first middle pattern blocks, and first outer reference pattern blocks, are disposed within the first region. Each first inner pattern block comprises line patterns and a block pattern. The block pattern has multiple space patterns arranged therein. The first inner pattern block is rotational symmetrical to the first middle pattern block.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 6, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou, Yi-Ting Chen, Sho-Shen Lee
  • Publication number: 20190109050
    Abstract: A semiconductor device includes a substrate having a fin structure extending along a first direction. The fin structure protrudes from a top surface of a trench isolation region and has a first height. A plurality of gate lines including a first gate line and a second gate line extend along a second direction and striding across the fin structure. The first gate line has a discontinuity directly above a gate cut region. The second gate line is disposed in proximity to a dummy fin region, and does not overlap with the dummy fin region. The fin structure has a second height within the dummy fin region, and the second height is smaller than the first height.
    Type: Application
    Filed: November 27, 2018
    Publication date: April 11, 2019
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou
  • Patent number: 10177094
    Abstract: A measurement make includes four rectangular regions having a first region and a second region arranged diagonally, and a third region and a fourth region arranged diagonally. A plurality sets of first inner pattern blocks, first middle pattern blocks, and first outer reference pattern blocks, are disposed within the first region. Each first inner pattern block comprises line patterns and a block pattern. The block pattern has multiple space patterns arranged therein. The first inner pattern block is rotational symmetrical to the first middle pattern block.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: January 8, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou, Yi-Ting Chen, Sho-Shen Lee
  • Patent number: 10170369
    Abstract: A semiconductor device includes a substrate having a fin structure extending along a first direction. The fin structure protrudes from a top surface of a trench isolation region and has a first height. A plurality of gate lines including a first gate line and a second gate line extend along a second direction and striding across the fin structure. The first gate line has a discontinuity directly above a gate cut region. The second gate line is disposed in proximity to a dummy fin region, and does not overlap with the dummy fin region. The fin structure has a second height within the dummy fin region, and the second height is smaller than the first height.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: January 1, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou
  • Publication number: 20120164269
    Abstract: A composition for making a deer antler wine is disclosed, which includes: a deer antler powder in an amount of 6-24 parts by weight; grapes in an amount of 15.5-62 parts by weight; tea in an amount of 4.5-18 parts by weight; and a ginseng in an amount of 6-24 parts by weight. A method for making a deer antler wine and a deer antler wine made thereby are also disclosed.
    Type: Application
    Filed: March 9, 2011
    Publication date: June 28, 2012
    Applicant: Eve Szu-Ju CHEN
    Inventors: Eve Szu-Ju Chen, David Hsiao-Lin Hsu