Patents by Inventor Hsiao Lin

Hsiao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10395999
    Abstract: A method for monitoring fin removal includes providing a substrate having a first region with first fins extending along a first direction and a second region with second fins extending along a second direction, wherein the first direction is perpendicular to the second direction; forming a material layer on the substrate to cover the first fins and the second fins; identically patterning the first fins and the second fins using a first pattern and a second pattern respectively for simultaneously removing parts of the first and second fins, thereby forming first fin features in the first region and second fin features in the second region, wherein the first pattern has a first dimension along the second direction, the second pattern has a second dimension along the second direction, and the second dimension is equal to the first dimension; and monitoring the first fin features using the second fin features.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: August 27, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hao Yang, En-Chiuan Liou, Hsiao-Lin Hsu, Tang-Chun Weng, Chia-Ching Lin, Yen-Pu Chen
  • Patent number: 10381454
    Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor with high capacitance and low leakage as well as a good interface control for thin film transistor (TFT) applications. In one embodiment, a thin film transistor structure includes a capacitor formed in a thin film transistor device. The capacitor further includes a common electrode disposed on a substrate, a dielectric layer formed on the common electrode and a pixel electrode formed on the dielectric layer. An interface protection layer formed between the common electrode and the dielectric layer, or between the dielectric layer and the pixel electrode. A gate insulating layer fabricated by a high-k material may also be utilized in the thin film transistor structure.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: August 13, 2019
    Assignee: PATTERSON + SHERIDAN LLP
    Inventors: Xuena Zhang, Dong-Kil Yim, Wenqing Dai, Harvey You, Tae Kyung Won, Hsiao-Lin Yang, Wan-Yu Lin, Yun-chu Tsai
  • Publication number: 20190244770
    Abstract: A button switch includes a base having a pillar, a cover disposed on the base, a sleeve, an arm adjacent to the pillar and an elastic member having upward-force-applying, extending-rod, and flexible-rod portions. The sleeve jackets the pillar, passes through the cover, and has first and second ribs. The upward-force-applying portion jackets the pillar and abuts against the sleeve and the base to drive the sleeve to move away from the base. The extending-rod portion extends from the upward-force-applying portion to be connected to the flexible-rod portion located under the first rib. When the sleeve is located at a high position, the second rib biases the arm to deform. When the sleeve is located at a low position, the second rib is misaligned with the arm. The flexible-rod portion crosses the first rib to be released and then collides with the cover to make sound as the sleeve is pressed.
    Type: Application
    Filed: January 28, 2019
    Publication date: August 8, 2019
    Inventors: Yu-Chun Hsieh, Yung-Chih Wang, Chen Yang, Chia-Hung Liu, Yen-Hsiao Lin
  • Patent number: 10373779
    Abstract: A key switch includes a base, a key cap, a link bar and a buffer member. A first hook of a first extending arm of the base and a second hook of a second extending arm of the base extend toward opposite directions respectively. An upper linking end of the link bar is movably connected to the key cap. The buffer member is made of material softer than material of the base. When the first hook and the second hook engage with a first engaging portion and a second engaging portion of the buffer member respectively, a recess structure of the buffer member is adjacent to the base to form a restraining structure. A lower linking end of the link bar is movably disposed through the restraining structure. Therefore, the key switch of the present invention has noise reduction capability.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: August 6, 2019
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Pen-Hui Liao, Chin-Hung Lin, Yen-Hsiao Lin, Hsin-Hung Liu, Chia-Fu Cheng
  • Patent number: 10373915
    Abstract: A measurement make includes four rectangular regions having a first region and a second region arranged diagonally, and a third region and a fourth region arranged diagonally. A plurality sets of first inner pattern blocks, first middle pattern blocks, and first outer reference pattern blocks, are disposed within the first region. Each first inner pattern block comprises line patterns and a block pattern. The block pattern has multiple space patterns arranged therein. The first inner pattern block is rotational symmetrical to the first middle pattern block.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 6, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou, Yi-Ting Chen, Sho-Shen Lee
  • Patent number: 10303445
    Abstract: A network service providing method is provided. Firstly, a network service platform is provided for allowing a user to create a workspace in a network service platform. At least one unified matter is allowed to be added to or removed from a projectable space instance that is for modeling the workspace. The projectable space instance is installed in a back-end system. When the projectable space instance is acquired by at least one machine through a URI, the projectable space instance is parsed by a projector, so that a projected workspace corresponding to the workspace is built in the at least one machine. The user and/or a second user interacts with the projected workspace, or a function of the at least one machine is dynamically configured through the projected workspace. A network service station is also provided.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: May 28, 2019
    Assignee: ABLE WORLD INTERNATIONAL LIMITED
    Inventors: Wai-Tung Cheung, Chun-Hsiao Lin, Ho-Cheung Cheung
  • Publication number: 20190109050
    Abstract: A semiconductor device includes a substrate having a fin structure extending along a first direction. The fin structure protrudes from a top surface of a trench isolation region and has a first height. A plurality of gate lines including a first gate line and a second gate line extend along a second direction and striding across the fin structure. The first gate line has a discontinuity directly above a gate cut region. The second gate line is disposed in proximity to a dummy fin region, and does not overlap with the dummy fin region. The fin structure has a second height within the dummy fin region, and the second height is smaller than the first height.
    Type: Application
    Filed: November 27, 2018
    Publication date: April 11, 2019
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou
  • Patent number: 10241803
    Abstract: Devices include a processor and a memory. The processor is configured to determine if a bootloader area does not contain a valid bootloader instruction set, to locate a bootloader instruction set, and to copy the bootloader instruction set to the bootloader area. The processor then executes the bootloader instruction set from the bootloader area.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: March 26, 2019
    Assignee: SCHNEIDER ELECTRIC IT CORPORATION
    Inventors: Wen-Chun Peng, Hsin-Hsiao Lin
  • Patent number: 10177094
    Abstract: A measurement make includes four rectangular regions having a first region and a second region arranged diagonally, and a third region and a fourth region arranged diagonally. A plurality sets of first inner pattern blocks, first middle pattern blocks, and first outer reference pattern blocks, are disposed within the first region. Each first inner pattern block comprises line patterns and a block pattern. The block pattern has multiple space patterns arranged therein. The first inner pattern block is rotational symmetrical to the first middle pattern block.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: January 8, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou, Yi-Ting Chen, Sho-Shen Lee
  • Patent number: 10170369
    Abstract: A semiconductor device includes a substrate having a fin structure extending along a first direction. The fin structure protrudes from a top surface of a trench isolation region and has a first height. A plurality of gate lines including a first gate line and a second gate line extend along a second direction and striding across the fin structure. The first gate line has a discontinuity directly above a gate cut region. The second gate line is disposed in proximity to a dummy fin region, and does not overlap with the dummy fin region. The fin structure has a second height within the dummy fin region, and the second height is smaller than the first height.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: January 1, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsiao-Lin Hsu, En-Chiuan Liou
  • Publication number: 20180376601
    Abstract: A fabrication method of a circuit includes drilling holes in a substrate, so as to form a plurality of first opening holes and second opening holes in the substrate. A cover film is attached onto the substrate, so as to cover the first opening holes and the second opening holes. A portion of the cover film covering the first opening holes is removed, so as to expose the first opening holes. The first opening holes are filled.
    Type: Application
    Filed: August 17, 2017
    Publication date: December 27, 2018
    Applicant: Gold Circuit Electronics Ltd.
    Inventors: Chih-Hai Yu, Kuo-Wei Lo, Cheng-Hsiao Lin
  • Publication number: 20180350537
    Abstract: A key switch includes a base, a key cap, a link bar and a buffer member. A first hook of a first extending arm of the base and a second hook of a second extending arm of the base extend toward opposite directions respectively. An upper linking end of the link bar is movably connected to the key cap. The buffer member is made of material softer than material of the base. When the first hook and the second hook engage with a first engaging portion and a second engaging portion of the buffer member respectively, a recess structure of the buffer member is adjacent to the base to form a restraining structure. A lower linking end of the link bar is movably disposed through the restraining structure. Therefore, the key switch of the present invention has noise reduction capability.
    Type: Application
    Filed: May 31, 2018
    Publication date: December 6, 2018
    Inventors: Pen-Hui Liao, Chin-Hung Lin, Yen-Hsiao Lin, Hsin-Hung Liu, Chia-Fu Cheng
  • Patent number: 10091473
    Abstract: A driver circuit includes a first voltage converter, a light source driver, a second voltage converter and a control circuit. The first voltage converter converts a first voltage to a second voltage. The light source driver is coupled to the first voltage converter, converts the second voltage to a third voltage and outputs the third voltage to a light source for providing light. The second voltage converter is coupled to the first voltage converter, converts the second voltage to a fourth voltage and outputs the fourth voltage. The control circuit is coupled to the second voltage converter to receive the fourth voltage and outputs a first control signal to control the light source driver for controlling the light source. The first voltage is lower than the second voltage, the second voltage is higher than the third voltage, and the second voltage is higher than the fourth voltage.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: October 2, 2018
    Assignee: Qisda Corporation
    Inventors: Chi-Jen Chen, Chun-Hsiao Lin, Fang-Chieh Lu, Chuan-Chu Chen
  • Publication number: 20180218905
    Abstract: A method and apparatus for equalized plasma coupling is provided herein. Discontinuity marks, also known as golf tee mura, are eliminated or minimized by biasing or grounding lift pins disposed in openings towards the center of a substrate support. To prevent shorting between a biased or grounded lift pin and the substrate support, lift pins are electrically isolated from the substrate support. The electrical isolation of the lift pin includes coating the lift pins with an electrically insulating material or lining a respective substrate support opening with an electrically insulating material.
    Type: Application
    Filed: January 30, 2018
    Publication date: August 2, 2018
    Inventors: Beom Soo PARK, Dongsuh LEE, Hsiao-Lin YANG, Fu-Ting CHANG, Hsiang AN, Tsung-Yao SU
  • Patent number: 9977660
    Abstract: In a method of controlling and managing an electronic device, which is executed by at least one control device to control and manage at least one electronic device, a projectable space instance is provided for each the at least one control device to create a workspace, wherein at least one unified tool for driving the at least one electronic device is selectively added to the projectable space instance. The projectable space instance is then parsed with a projector by the corresponding control device to automatically generate a projected workspace corresponding to the workspace to be created via the projectable space instance, wherein the at least one unified tool drives the at least one electronic device to execute at least one task in response to an operation on the corresponding control device.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: May 22, 2018
    Assignee: ABLE WORLD INTERNATIONAL LIMITED
    Inventors: Wai-Tung Cheung, Chun-Hsiao Lin, Shih-Cheng Lan, Ho-Cheung Cheung
  • Publication number: 20180095769
    Abstract: Devices include a processor and a memory. The processor is configured to determine if a bootloader area does not contain a valid bootloader instruction set, to locate a bootloader instruction set, and to copy the bootloader instruction set to the bootloader area. The processor then executes the bootloader instruction set from the bootloader area.
    Type: Application
    Filed: October 3, 2016
    Publication date: April 5, 2018
    Inventors: Wen-Chun Peng, Hsin-Hsiao Lin
  • Patent number: 9934007
    Abstract: A method for operating a tool in a working environment is provided. Firstly, a website-based working environment for operating a unified tool is provided in a browser. A software development kit is used as at least one standard interface of transmitting data and/or commands between the working environment and a unified inline frame. The software development kit is compatibly executed between the working environment and the unified inline frame. Then, the unified tool is operated in the working environment as the inline frame which is loaded with an adapter is loaded. The adapter is produced as a software module which is the integration of an original tool incompatible with the working environment and the standard interface. The original tool is executed by the working environment through the standard interface.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: April 3, 2018
    Assignee: ABLE WORLD INTERNATIONAL LIMITED
    Inventors: Wai-Tung Cheung, Chun-Hsiao Lin, Shih-Cheng Lan, Ho-Cheung Cheung
  • Publication number: 20180046439
    Abstract: A network service providing method is provided. Firstly, a network service platform is provided for allowing a user to create a workspace in a network service platform. At least one unified matter is allowed to be added to or removed from a projectable space instance that is for modeling the workspace. The projectable space instance is installed in a back-end system. When the projectable space instance is acquired by at least one machine through a URI, the projectable space instance is parsed by a projector, so that a projected workspace corresponding to the workspace is built in the at least one machine. The user and/or a second user interacts with the projected workspace, or a function of the at least one machine is dynamically configured through the projected workspace. A network service station is also provided.
    Type: Application
    Filed: December 11, 2015
    Publication date: February 15, 2018
    Inventors: WAI-TUNG CHEUNG, CHUN-HSIAO LIN, HO-CHEUNG CHEUNG
  • Publication number: 20180032313
    Abstract: A method for accessing an accessible article, and a system and an accessible article using the method are provided. The user can establish authentication between the user device and the accessible article via the projectable space instance containing the space ID. Consequently, the user device acquires the access right to the accessible article. Under this circumstance, the user can control and manage the accessible article via the user device and receive associated inner information from the accessible article.
    Type: Application
    Filed: December 11, 2015
    Publication date: February 1, 2018
    Inventors: WAI-TUNG CHEUNG, CHUN-HSIAO LIN, HO-CHEUNG CHEUNG
  • Publication number: 20180025450
    Abstract: A property management method is provided. Firstly, a projectable space instance for modeling a home system is provided. When the projectable space instance is acquired by a user, a projector parses the projectable space instance. After the projectable space instance is parsed, a projected home system corresponding to the home system is created, so that at least one property is accessible by the user. The present invention also provides a property management system and a machine using the property management method.
    Type: Application
    Filed: January 12, 2016
    Publication date: January 25, 2018
    Inventors: WAI-TUNG CHEUNG, CHUN-HSIAO LIN, HO-CHEUNG CHEUNG