Patents by Inventor Hsiao Liu

Hsiao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981846
    Abstract: Disclosed herein is a nanocomposite comprising a core-shell nanoparticle and a core-shell quantum dot. The core-shell nanoparticle comprises a phosphor core, a shell layer, and a cleavable peptide. The core-shell quantum dot comprises a center core, an intermediate layer, an outer layer, a silica layer, and an arginylglycylaspartic acid (RGD) peptide. The core-shell nanoparticle and the core-shell quantum dot are linked to each other via forming a peptide bond between the cleavable peptide and the RGD peptide. Also disclosed are the uses of the nanocomposite in making a diagnosis of tumors.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: May 14, 2024
    Assignee: ACADEMIA SINICA
    Inventors: Michael Hsiao, Ming-Hsien Chan, Subbiramaniyan Kubendhiran, Ming-Che Hsieh, Zhen Bao, An-Bang Wang, Ru-Shi Liu
  • Publication number: 20240136463
    Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 25, 2024
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Chieh LIN, Shiuan-Leh LIN, Yung-Fu CHANG, Shih-Chang LEE, Chia-Liang HSU, Yi HSIAO, Wen-Luh LIAO, Hong-Chi SHIH, Mei-Chun LIU
  • Publication number: 20240128313
    Abstract: A method includes providing a substrate, forming a patterned hard mask layer over the substrate, etching the patterned hard mask layer to form a hole that penetrates the patterned hard mask layer, forming a barrier portion in the hole, removing the patterned hard mask layer, and forming a gate structure over the substrate. Formation of the gate structure includes forming a dielectric body portion on the substrate. The barrier portion that is thicker than the dielectric body portion adjoins one end of the dielectric body portion. The dielectric body portion and the barrier portion are collectively referred to as a gate dielectric layer. Formation of the gate structure further includes forming a gate electrode on the gate dielectric layer and forming gate spacers on opposite sidewalls of the gate electrode. During formation of the gate spacers, a portion of the barrier portion is removed to form a recessed corner.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tse-Hsiao LIU, Chih-Wei LIN, Po-Hao CHIU, Pi-Kuang CHUANG, Ching-Yi HSU
  • Publication number: 20230060729
    Abstract: The present disclosure is related to a power module. The power module includes first fasteners and power devices. The power devices are adjacently disposed and locked by the first fasteners. Each of the power devices packages a power electronic therein. Each of the power devices includes a first extending portion. The first extending portion extends from a side of the power device. The first extending portion includes at least one first curved opening for receiving the first fastener. The first curved openings are adjacently disposed to form a first inserting hole. The first fastener passes through the first inserting hole.
    Type: Application
    Filed: August 30, 2022
    Publication date: March 2, 2023
    Inventors: Chia-Chi WU, Lian-An JIAN, Cheng-Yu SHEN, Chun-Hong CHEN, Hung-Hsiao LIU
  • Patent number: 11387361
    Abstract: A method for forming a semiconductor structure includes: forming a first gate structure in a predetermined low-potential region of a substrate and a second gate structure in a predetermined high-potential region of the substrate; sequentially forming a first dielectric layer and a second dielectric layer covering the first gate structure and the second gate structure; forming a portion of a third dielectric layer along sidewalls of the second gate structure and on the second dielectric layer; and etching the first dielectric layer and the second dielectric layer with the portion of the third dielectric layer as an etching hard mask to form a first composite spacer covering sidewalls of the first gate structure, and a second composite spacer covering the sidewalls of the second gate structure, wherein a width of the first composite spacer is less than a width of the second composite spacer.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: July 12, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chin-Hsiu Huang, Tse-Hsiao Liu, Pao-Hao Chiu, Chih-Cherng Liao, Ching-Yi Hsu
  • Publication number: 20210249536
    Abstract: A method for forming a semiconductor structure includes: forming a first gate structure in a predetermined low-potential region of a substrate and a second gate structure in a predetermined high-potential region of the substrate; sequentially forming a first dielectric layer and a second dielectric layer covering the first gate structure and the second gate structure; forming a portion of a third dielectric layer along sidewalls of the second gate structure and on the second dielectric layer; and etching the first dielectric layer and the second dielectric layer with the portion of the third dielectric layer as an etching hard mask to form a first composite spacer covering sidewalls of the first gate structure, and a second composite spacer covering the sidewalls of the second gate structure, wherein a width of the first composite spacer is less than a width of the second composite spacer.
    Type: Application
    Filed: February 6, 2020
    Publication date: August 12, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chin-Hsiu HUANG, Tse-Hsiao LIU, Pao-Hao CHIU, Chih-Cherng LIAO, Ching-Yi HSU
  • Patent number: 9978864
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a first conductive type well region; a gate structure; a lightly-doped drain region and a lightly-doped source region disposed at two opposite sides of the gate structure; a second conductive type first doped region disposed in the lightly-doped drain region, wherein the doping concentration of the second conductive type first doped region is less than the doping concentration of the lightly-doped drain region; a heavily-doped source region disposed in the lightly-doped source region; and a heavily-doped drain region disposed in the second conductive type first doped region. The present disclosure also provides a method for manufacturing the semiconductor device.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: May 22, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Tse-Hsiao Liu, Sing-Lin Wu, Chung-Hsuan Wang, Yung-Lung Chou, Chia-Hao Lee, Chih-Cherng Liao
  • Publication number: 20170162691
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a first conductive type well region; a gate structure; a lightly-doped drain region and a lightly-doped source region disposed at two opposite sides of the gate structure; a second conductive type first doped region disposed in the lightly-doped drain region, wherein the doping concentration of the second conductive type first doped region is less than the doping concentration of the lightly-doped drain region; a heavily-doped source region disposed in the lightly-doped source region; and a heavily-doped drain region disposed in the second conductive type first doped region. The present disclosure also provides a method for manufacturing the semiconductor device.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 8, 2017
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tse-Hsiao LIU, Sing-Lin WU, Chung-Hsuan WANG, Yung-Lung CHOU, Chia-Hao LEE, Chih-Cherng LIAO
  • Publication number: 20150207166
    Abstract: A fuel cell for improving flow field uniformity and reducing gas pressure loss includes a fuel cell stack and a gas input unit. The gas input unit has a gas input passage, an input port, an input baffle plate and at least one perforated plate. An end of the gas input passage is connected to an end of the fuel cell stack. The input port is disposed on another end of the gas input passage. The input baffle plate is disposed in the gas input passage and located in front of the input port, and a gap exists between the input baffle plate and the input port. The perforated plate is disposed between the input baffle plate and the fuel cell stack.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 23, 2015
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Che-Wun Hong, Hung-Hsiao Liu, Angel Giancarlo Miranda Canales
  • Publication number: 20150198147
    Abstract: A fuel cell incorporating a wind power generating device includes a fuel cell stack, a gas input unit and a wind power generating device. The gas input unit, configured to provide an input gas, includes a gas diffusion path and an inlet. The cell stack is connected to an end of the gas diffusion path. The inlet is disposed on another end of the gas diffusion path. The wind power generating device includes at least one first fan and a first electric generator. The at least one first fan is disposed in the gas diffusion path and is actuated by the input gas to drive the electric generator for generating electricity from wind power.
    Type: Application
    Filed: March 6, 2014
    Publication date: July 16, 2015
    Applicant: National Tsing Hua University
    Inventors: Che-Wun Hong, Hung-Hsiao Liu
  • Publication number: 20140137164
    Abstract: An In-Flight Entertainment system is provided with a server unit and a display unit. The server unit is configured to maintain digital content. The display unit is configured to connect to the server unit through a wired network for receiving and presenting the digital content. The display unit further includes a wireless module for wirelessly transmitting the digital content received from the server unit to be presented by a first portable device.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 15, 2014
    Applicant: DELTA NETWORKS, INC.
    Inventors: Hsi-Ching YANG, Ta LIN, Chien-Heng WU, Jyh-Ming KUO, Tsen-Hsiao LIU
  • Patent number: 8610523
    Abstract: The invention is a magnetic fix structure that applies on a projection device. The magnetic fix structure includes a first magnetic connector set and a second magnetic connector set, and the projection device includes a projection module housing and a power module housing. The first magnetic connector set and the second magnetic connector set are disposed on the projection module housing and the power module housing respectively. Therefore, through the attraction between the first magnetic connector set and the second magnetic connector set, the power module housing can be fixed onto the projection module housing.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: December 17, 2013
    Assignee: Delta Electronics, Inc.
    Inventors: Tsang-Hsing Ku, Kuang-Hsiao Liu
  • Publication number: 20120194977
    Abstract: A portable electronic device includes a main portion, a display portion and a support arm. The main portion has an accommodation area on an upper surface thereof. The support arm is pivotally connected with the main portion at a first end and pivotally connected with the display portion at an opposite second end such that the display portion is rotatable relative to the main portion by means of the support arm. When the display portion is laid against the main portion, the support arm is disposed within the accommodation area.
    Type: Application
    Filed: July 29, 2011
    Publication date: August 2, 2012
    Applicant: Quanta Computer Inc.
    Inventors: Chih-Hsiao Liu, Tsung-Ju Chiang, Li-Ke Chen, Chun-Yi Yuan
  • Publication number: 20120188034
    Abstract: The invention is a magnetic fix structure that applies on a projection device. The magnetic fix structure includes a first magnetic connector set and a second magnetic connector set, and the projection device includes a projection module housing and a power module housing. The first magnetic connector set and the second magnetic connector set are disposed on the projection module housing and the power module housing respectively. Therefore, through the attraction between the first magnetic connector set and the second magnetic connector set, the power module housing can be fixed onto the projection module housing.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 26, 2012
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Tsang-Hsing Ku, Kuang-Hsiao Liu
  • Patent number: 8085547
    Abstract: An electronic elements carrier includes a body, at least an electronic element and a filler. The body includes a substrate having a plate and a dam formed on the peripheral of plate, a conductive layer mounted on a surface of the dam, and at least a cavity defined by the plate and the dam of the substrate. The electronic element is disposed in the cavity of the body. The filler is received in the cavity of the substrate for encapsulating, sealing and protecting the electronic element.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: December 27, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Ying-Cheng Wu, Kun-Hsiao Liu
  • Patent number: 7521770
    Abstract: An image capturing device includes an image sensor package and a lens module aligned with the image sensor package. The image sensor package includes a substrate, at least one passive component, an insulative layer, and an image sensor. The substrate has a surface facing an object side of the image capturing device, the surface defines a cavity therein. The at least one passive component is disposed within the cavity and electrically connected to the substrate. The insulative layer is received in the cavity and encases the at least one passive component. The image sensor is disposed on the insulative layer and electrically connected to the substrate. The holder has an end connecting with the barrel and an opposite end secured on the substrate.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: April 21, 2009
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Ying-Cheng Wu, Kun-Hsiao Liu
  • Publication number: 20080265350
    Abstract: An image capturing device includes an image sensor package and a lens module aligned with the image sensor package. The image sensor package includes a substrate, at least one passive component, an insulative layer, and an image sensor. The substrate has a surface facing an object side of the image capturing device, the surface defines a cavity therein. The at least one passive component is disposed within the cavity and electrically connected to the substrate. The insulative layer is received in the cavity and encases the at least one passive component. The image sensor is disposed on the insulative layer and electrically connected to the substrate. The holder has an end connecting with the barrel and an opposite end secured on the substrate.
    Type: Application
    Filed: September 27, 2007
    Publication date: October 30, 2008
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YING-CHENG WU, KUN-HSIAO LIU
  • Publication number: 20080266822
    Abstract: An electronic elements carrier includes a body, at least an electronic element and a filler. The body includes a substrate having a plate and a dam formed on the peripheral of plate, a conductive layer mounted on a surface of the dam, and at least a cavity defined by the plate and the dam of the substrate. The electronic element is disposed in the cavity of the body. The filler is received in the cavity of the substrate for encapsulating, sealing and protecting the electronic element.
    Type: Application
    Filed: November 30, 2007
    Publication date: October 30, 2008
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YING-CHENG WU, KUN-HSIAO LIU
  • Publication number: 20080251875
    Abstract: An exemplary semiconductor package includes a substrate, at least one passive component, an insulative layer and a chip. The substrate defines a cavity therein. The at least one passive component is disposed within the cavity, and is electrically connected to the substrate. The insulative layer is received in the cavity, and encases the at least one passive component. The chip is disposed on the insulative layer, and is electrically connected to the substrate. The semiconductor package packaging the at least one passive component within the cavity and under the chip can improve a space usage thereof, thus a packaging scale of the semiconductor package could be reduced.
    Type: Application
    Filed: September 5, 2007
    Publication date: October 16, 2008
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YING-CHENG WU, KUN-HSIAO LIU
  • Publication number: 20070077959
    Abstract: This provides a system to emit a plurality of electronic signals, sent by a person(s) trapped by some disaster, such as collapse of building, earthquake, flood, etc. The plurality of signals provides a better chance that rescuers will receive at least one signal.
    Type: Application
    Filed: September 19, 2005
    Publication date: April 5, 2007
    Inventors: Edward Newman, Sean Newman, Benjamin Newman, Richard Bizar, Hsiao Liu