Patents by Inventor Hsiao-Sheng Chin

Hsiao-Sheng Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PLANARIZATION METHOD ON A DAMASCENE STRUCTURE
    Publication number: 20020048934
    Abstract: A planarization method is used in a dual damascene structure. At the stage that a dual damascene structure is semi-formed on a semiconductor substrate but before a planarization process, the planarization method starts by forming a dielectric layer on a metal layer, which is to be polished. A portion of the dielectric layer other than the dual damascene structure is removed by etching. A CMP process is performed to planarize the substrate and exposes an inter-metal dielectric layer.
    Type: Application
    Filed: August 28, 1998
    Publication date: April 25, 2002
    Inventors: MING-SHIOU SHIEH, HSIAO-SHENG CHIN
  • Planarization method on a damascene structure
    Patent number: 6362092
    Abstract: A planarization method is used in a dual damascene structure. At the stage that a dual damascene structure is semi-formed on a semiconductor substrate but before a planarization process, the planarization method starts by forming a dielectric layer on a metal layer, which is to be polished. A portion of the dielectric layer other than the dual damascene structure is removed by etching. A CMP process is performed to planarize the substrate and exposes an inter-metal dielectric layer.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: March 26, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Shiou Shieh, Hsiao-Sheng Chin